From 54a7a1cc01138d6740b05e5c525ed9401befdf25 Mon Sep 17 00:00:00 2001 From: Xing Zheng Date: Sat, 26 Mar 2022 10:19:31 +0800 Subject: [PATCH] clk: rockchip: rv1106: remove the mclk_acodec_rx Dues to the broken doc, there is no path of mclk_i2s0_rx to mclk_acodec_rx, we need to remove it directly and let mclk_acodec_tx below to the mclk_i2s0_8ch_tx. - Before: clk_i2s0_8ch_rx_src 1 1 0 594000000 0 0 50000 clk_i2s0_8ch_rx_frac 1 1 0 12288000 0 0 50000 clk_i2s0_8ch_rx 1 1 0 12288000 0 0 50000 mclk_i2s0_8ch_rx 2 2 0 12288000 0 0 50000 mclk_acodec_rx 1 1 0 12288000 0 0 50000 clk_i2s0_8ch_tx_src 1 1 0 594000000 0 0 50000 clk_i2s0_8ch_tx_frac 1 1 0 12288000 0 0 50000 clk_i2s0_8ch_tx 1 1 0 12288000 0 0 50000 mclk_i2s0_8ch_tx 2 2 0 12288000 0 0 50000 mclk_acodec_tx 1 1 0 12288000 0 0 50000 - After: clk_i2s0_8ch_rx_src 1 1 0 594000000 0 0 50000 clk_i2s0_8ch_rx_frac 1 1 0 12288000 0 0 50000 clk_i2s0_8ch_rx 1 1 0 12288000 0 0 50000 mclk_i2s0_8ch_rx 1 1 0 12288000 0 0 50000 clk_i2s0_8ch_tx_src 1 1 0 594000000 0 0 50000 clk_i2s0_8ch_tx_frac 1 1 0 12288000 0 0 50000 clk_i2s0_8ch_tx 1 1 0 12288000 0 0 50000 mclk_i2s0_8ch_tx 2 2 0 12288000 0 0 50000 mclk_sai 0 0 0 12288000 0 0 50000 mclk_dsm 0 0 0 12288000 0 0 50000 mclk_acodec_tx 1 1 0 12288000 0 0 50000 Signed-off-by: Xing Zheng Change-Id: I223189b6852f2e796eeb01ad4ce957fde7f9a52c --- drivers/clk/rockchip/clk-rv1106.c | 3 --- include/dt-bindings/clock/rv1106-cru.h | 1 - 2 files changed, 4 deletions(-) diff --git a/drivers/clk/rockchip/clk-rv1106.c b/drivers/clk/rockchip/clk-rv1106.c index feaa6c231dbd..00b3a206a956 100644 --- a/drivers/clk/rockchip/clk-rv1106.c +++ b/drivers/clk/rockchip/clk-rv1106.c @@ -480,9 +480,6 @@ static struct rockchip_clk_branch rv1106_clk_branches[] __initdata = { COMPOSITE_NOMUX(MCLK_ACODEC_TX, "mclk_acodec_tx", "mclk_i2s0_8ch_tx", 0, RV1106_PERICLKSEL_CON(8), 0, 8, DFLAGS, RV1106_PERICLKGATE_CON(6), 4, GFLAGS), - COMPOSITE_NOMUX(MCLK_ACODEC_RX, "mclk_acodec_rx", "mclk_i2s0_8ch_rx", 0, - RV1106_PERICLKSEL_CON(8), 8, 8, DFLAGS, - RV1106_PERICLKGATE_CON(6), 5, GFLAGS), COMPOSITE_NODIV(CLK_CORE_CRYPTO, "clk_core_crypto", mux_300m_200m_100m_24m_p, 0, RV1106_PERICLKSEL_CON(6), 5, 2, MFLAGS, RV1106_PERICLKGATE_CON(3), 11, GFLAGS), diff --git a/include/dt-bindings/clock/rv1106-cru.h b/include/dt-bindings/clock/rv1106-cru.h index 8febd5d8a669..abac9363fe4c 100644 --- a/include/dt-bindings/clock/rv1106-cru.h +++ b/include/dt-bindings/clock/rv1106-cru.h @@ -30,7 +30,6 @@ #define ACLK_RKNN 23 #define PCLK_ACODEC 24 #define MCLK_ACODEC_TX 25 -#define MCLK_ACODEC_RX 26 #define CLK_CORE_CRYPTO 27 #define CLK_PKA_CRYPTO 28 #define ACLK_CRYPTO 29