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drm/ast: Fix open-coded scu_rev access

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Replace all open-coded access to P2A and SCU registers in the device
detection with the appropriate calls to ast_moutdwm() and ast_mindwm().
Use P2A and MCR register constants. Name variables according to registers.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com>
Link: https://patch.msgid.link/20260327133532.79696-16-tzimmermann@suse.de
This commit is contained in:
Thomas Zimmermann 2026-03-27 14:33:07 +01:00
parent e60dccc256
commit 53217ef456
2 changed files with 7 additions and 7 deletions
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13
drivers/gpu/drm/ast/ast_drv.c
View File

@ -242,7 +242,7 @@ static int ast_detect_chip(struct pci_dev *pdev,
enum ast_config_mode config_mode = ast_use_defaults;
uint32_t scu_rev = 0xffffffff;
enum ast_chip chip;
u32 data;
u32 data, p2a04, scu07c;
u8 vgacrd0, vgacrd1;
/*
@ -275,14 +275,13 @@ static int ast_detect_chip(struct pci_dev *pdev,
}
/* Double check that it's actually working */
data = __ast_read32(regs, 0xf004);
if ((data != 0xffffffff) && (data != 0x00)) {
p2a04 = __ast_read32(regs, AST_REG_P2A04);
if (p2a04 != 0xffffffff && p2a04 != 0x00000000) {
config_mode = ast_use_p2a;
/* Read SCU7c (silicon revision register) */
__ast_write32(regs, 0xf004, AST_REG_MCR00);
__ast_write32(regs, 0xf000, 0x1);
scu_rev = __ast_read32(regs, 0x1207c);
/* Read SCU7C (silicon revision register) */
scu07c = __ast_mindwm(regs, AST_REG_SCU07C);
scu_rev = scu07c & AST_REG_SCU07C_CHIP_BONDING_MASK;
}
}
}

1
drivers/gpu/drm/ast/ast_reg.h
View File

@ -191,6 +191,7 @@
#define AST_REG_SCU040 AST_REG_SCU(0x040)
#define AST_REG_SCU070 AST_REG_SCU(0x070)
#define AST_REG_SCU07C AST_REG_SCU(0x07c)
#define AST_REG_SCU07C_CHIP_BONDING_MASK GENMASK(15, 8)
#define AST_REG_SCU084 AST_REG_SCU(0x084)
#define AST_REG_SCU088 AST_REG_SCU(0x088)
#define AST_REG_SCU08C AST_REG_SCU(0x08c)