drm/amdgpu: Setup PCIe atomics bit in PTE on GFX 12.1.0

To enable atomic access to memory, setup the new PCIe atomics bit
in PTE on GFX 12.1.0.

Signed-off-by: Mukul Joshi <mukul.joshi@amd.com>
Reviewed-by: Alex Sierra <alex.sierra@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Mukul Joshi 2025-02-26 15:45:46 -05:00 committed by Alex Deucher
parent e08a675f94
commit 4da4990337
2 changed files with 8 additions and 0 deletions

View File

@ -308,6 +308,9 @@ static void gmc_v12_1_get_vm_pte(struct amdgpu_device *adev,
if (bo && bo->flags & AMDGPU_GEM_CREATE_UNCACHED)
*flags = AMDGPU_PTE_MTYPE_GFX12(*flags, MTYPE_UC);
if (adev->have_atomics_support)
*flags |= AMDGPU_PTE_BUS_ATOMICS;
}
static const struct amdgpu_gmc_funcs gmc_v12_1_gmc_funcs = {

View File

@ -1305,6 +1305,11 @@ svm_range_get_pte_flags(struct kfd_node *node, struct amdgpu_vm *vm,
pte_flags |= AMDGPU_PTE_READABLE;
if (!(flags & KFD_IOCTL_SVM_FLAG_GPU_RO))
pte_flags |= AMDGPU_PTE_WRITEABLE;
if ((gc_ip_version == IP_VERSION(12, 1, 0)) &&
node->adev->have_atomics_support)
pte_flags |= AMDGPU_PTE_BUS_ATOMICS;
return pte_flags;
}