drm/amdgpu: Setup Atomics enable in TCP UTCL0 for GFX 12.1.0

We need to explicitly setup atomics enable in TCP UTCL0 to enable
PCIe atomics to host memory.

Signed-off-by: Mukul Joshi <mukul.joshi@amd.com>
Reviewed-by: Alex Sierra <alex.sierra@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Mukul Joshi 2025-02-26 15:35:23 -05:00 committed by Alex Deucher
parent 9c34a4c19e
commit e08a675f94

View File

@ -2521,6 +2521,12 @@ static void gfx_v12_1_init_golden_registers(struct amdgpu_device *adev)
RETRY_FRAGMENT_THRESHOLD_UP_EN, 0x0);
WREG32_SOC15(GC, 0, regTCP_UTCL0_THRASHING_CTRL, val);
/* Set the TCP UTCL0 register to enable atomics */
val = RREG32_SOC15(GC, 0, regTCP_UTCL0_CNTL1);
val = REG_SET_FIELD(val, TCP_UTCL0_CNTL1, ATOMIC_REQUESTER_EN, 0x1);
WREG32_SOC15(GC, 0, regTCP_UTCL0_CNTL1, val);
}
static int gfx_v12_1_hw_init(struct amdgpu_ip_block *ip_block)