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phy: tegra: xusb: Increase timeout for USB2_TRK_COMPLETED polling

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On Tegra264, the UTMI bias tracking circuit runs at 1 MHz and needs
more cycles for the biases to settle than on earlier SoCs such as
Tegra234. The existing timeout is therefore not long enough and can
cause spurious polling failures during bias pad power-on. Therefore,
increase the timeout to 200 cycles to support Tegra264 devices

Signed-off-by: Wayne Chang <waynec@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Link: https://patch.msgid.link/20260903071937.533646-4-waynec@nvidia.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
Wayne Chang 2026-09-03 15:19:36 +08:00 committed by Vinod Koul
parent 9358936fa1
commit 475df243ff
1 changed files with 1 additions and 1 deletions
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2
drivers/phy/tegra/xusb-tegra186.c
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@ -636,7 +636,7 @@ static void tegra186_utmi_bias_pad_power_on(struct tegra_xusb_padctl *padctl)
if (padctl->soc->poll_trk_completed) {
err = padctl_readl_poll(padctl, XUSB_PADCTL_USB2_BIAS_PAD_CTL1,
USB2_TRK_COMPLETED, USB2_TRK_COMPLETED, 100);
USB2_TRK_COMPLETED, USB2_TRK_COMPLETED, 200);
if (err) {
/* The failure with polling on trk complete will not
* cause the failure of powering on the bias pad.