From 475df243ffcad579c9beb6fbd47b1f9ee1045b7c Mon Sep 17 00:00:00 2001 From: Wayne Chang Date: Thu, 3 Sep 2026 15:19:36 +0800 Subject: [PATCH] phy: tegra: xusb: Increase timeout for USB2_TRK_COMPLETED polling On Tegra264, the UTMI bias tracking circuit runs at 1 MHz and needs more cycles for the biases to settle than on earlier SoCs such as Tegra234. The existing timeout is therefore not long enough and can cause spurious polling failures during bias pad power-on. Therefore, increase the timeout to 200 cycles to support Tegra264 devices Signed-off-by: Wayne Chang Reviewed-by: Jon Hunter Tested-by: Jon Hunter Link: https://patch.msgid.link/20260903071937.533646-4-waynec@nvidia.com Signed-off-by: Vinod Koul --- drivers/phy/tegra/xusb-tegra186.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/phy/tegra/xusb-tegra186.c b/drivers/phy/tegra/xusb-tegra186.c index 800be0cbb3f9..9c1bcd4a72ac 100644 --- a/drivers/phy/tegra/xusb-tegra186.c +++ b/drivers/phy/tegra/xusb-tegra186.c @@ -636,7 +636,7 @@ static void tegra186_utmi_bias_pad_power_on(struct tegra_xusb_padctl *padctl) if (padctl->soc->poll_trk_completed) { err = padctl_readl_poll(padctl, XUSB_PADCTL_USB2_BIAS_PAD_CTL1, - USB2_TRK_COMPLETED, USB2_TRK_COMPLETED, 100); + USB2_TRK_COMPLETED, USB2_TRK_COMPLETED, 200); if (err) { /* The failure with polling on trk complete will not * cause the failure of powering on the bias pad.