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clk: qcom: clk-spmi-pmic-div: avoid potential divide-by-0

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Add a check of the cxo_hz value to ensure that it is greater than
0.  That way, there is no chance of division by zero when using
cxo_hz to calculate cxo_period_ns.

Change-Id: I5498b7a08e4cb3be45469041a973d045f2ec2bdb
Signed-off-by: David Collins <collinsd@codeaurora.org>
This commit is contained in:
David Collins 2018-01-19 15:14:00 -08:00 committed by Mike Tipton
parent cc4ad0b211
commit 4297f2dcbe
1 changed files with 4 additions and 0 deletions
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4
drivers/clk/qcom/clk-spmi-pmic-div.c
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@ -245,6 +245,10 @@ static int spmi_pmic_clkdiv_probe(struct platform_device *pdev)
}
cxo_hz = clk_get_rate(cxo);
clk_put(cxo);
if (cxo_hz <= 0) {
dev_err(dev, "invalid CXO rate: %d\n", cxo_hz);
return -EINVAL;
}
parent_name = of_clk_get_parent_name(of_node, 0);
if (!parent_name) {