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KVM: arm64: selftests: Update vGICv5 selftest to set IRS address

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This selftest was added before the GICv5 IRS was supported in
KVM. Therefore, there was no address to set, and the specific UAPI
didn't even exist.

Now that the IRS is supported, and setting its address is mandatory
before VGIC resources are mapped, set the emulated IRS GPA before
initialising the VGIC. Running a GICv5 VM will fail if userspace has
not provided the IRS address before the first vCPU run.

Signed-off-by: Sascha Bischoff <sascha.bischoff@arm.com>
Link: https://patch.msgid.link/20260904113404.4051341-25-sascha.bischoff@arm.com
Signed-off-by: Marc Zyngier <maz@kernel.org>
This commit is contained in:
Sascha Bischoff 2026-09-04 11:46:27 +00:00 committed by Marc Zyngier
parent 0829416d81
commit 414e17f21c
2 changed files with 9 additions and 0 deletions
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6
tools/testing/selftests/kvm/arm64/vgic_v5.c
View File

@ -100,6 +100,7 @@ static void test_vgic_v5_ppis(u32 gic_dev_type)
struct ucall uc;
u64 user_ppis[2];
struct vm_gic v;
uint64_t attr;
int ret, i;
v.gic_dev_type = gic_dev_type;
@ -116,6 +117,11 @@ static void test_vgic_v5_ppis(u32 gic_dev_type)
for (i = 0; i < NR_VCPUS; i++)
vcpu_init_descriptor_tables(vcpus[i]);
/* Set the address of the IRS before initialising the GIC */
attr = GICV5_IRS_CONFIG_BASE_GPA;
kvm_device_attr_set(v.gic_fd, KVM_DEV_ARM_VGIC_GRP_ADDR,
KVM_VGIC_V5_ADDR_TYPE_IRS, &attr);
kvm_device_attr_set(v.gic_fd, KVM_DEV_ARM_VGIC_GRP_CTRL,
KVM_DEV_ARM_VGIC_CTRL_INIT, NULL);

3
tools/testing/selftests/kvm/include/arm64/gic_v5.h
View File

@ -10,6 +10,9 @@
#include "processor.h"
/* GIC component base address is guest PA space */
#define GICV5_IRS_CONFIG_BASE_GPA 0x8000000ULL
/*
* Definitions for GICv5 instructions for the Current Domain
*/