From 414e17f21cfba084c6beb805c2b1d4bce15ed390 Mon Sep 17 00:00:00 2001 From: Sascha Bischoff Date: Fri, 4 Sep 2026 11:46:27 +0000 Subject: [PATCH] KVM: arm64: selftests: Update vGICv5 selftest to set IRS address This selftest was added before the GICv5 IRS was supported in KVM. Therefore, there was no address to set, and the specific UAPI didn't even exist. Now that the IRS is supported, and setting its address is mandatory before VGIC resources are mapped, set the emulated IRS GPA before initialising the VGIC. Running a GICv5 VM will fail if userspace has not provided the IRS address before the first vCPU run. Signed-off-by: Sascha Bischoff Link: https://patch.msgid.link/20260904113404.4051341-25-sascha.bischoff@arm.com Signed-off-by: Marc Zyngier --- tools/testing/selftests/kvm/arm64/vgic_v5.c | 6 ++++++ tools/testing/selftests/kvm/include/arm64/gic_v5.h | 3 +++ 2 files changed, 9 insertions(+) diff --git a/tools/testing/selftests/kvm/arm64/vgic_v5.c b/tools/testing/selftests/kvm/arm64/vgic_v5.c index 96cfd6bb32f6..19039a894056 100644 --- a/tools/testing/selftests/kvm/arm64/vgic_v5.c +++ b/tools/testing/selftests/kvm/arm64/vgic_v5.c @@ -100,6 +100,7 @@ static void test_vgic_v5_ppis(u32 gic_dev_type) struct ucall uc; u64 user_ppis[2]; struct vm_gic v; + uint64_t attr; int ret, i; v.gic_dev_type = gic_dev_type; @@ -116,6 +117,11 @@ static void test_vgic_v5_ppis(u32 gic_dev_type) for (i = 0; i < NR_VCPUS; i++) vcpu_init_descriptor_tables(vcpus[i]); + /* Set the address of the IRS before initialising the GIC */ + attr = GICV5_IRS_CONFIG_BASE_GPA; + kvm_device_attr_set(v.gic_fd, KVM_DEV_ARM_VGIC_GRP_ADDR, + KVM_VGIC_V5_ADDR_TYPE_IRS, &attr); + kvm_device_attr_set(v.gic_fd, KVM_DEV_ARM_VGIC_GRP_CTRL, KVM_DEV_ARM_VGIC_CTRL_INIT, NULL); diff --git a/tools/testing/selftests/kvm/include/arm64/gic_v5.h b/tools/testing/selftests/kvm/include/arm64/gic_v5.h index eb523d9277cf..c388df8f2a2b 100644 --- a/tools/testing/selftests/kvm/include/arm64/gic_v5.h +++ b/tools/testing/selftests/kvm/include/arm64/gic_v5.h @@ -10,6 +10,9 @@ #include "processor.h" +/* GIC component base address is guest PA space */ +#define GICV5_IRS_CONFIG_BASE_GPA 0x8000000ULL + /* * Definitions for GICv5 instructions for the Current Domain */