arm64: dts: rockchip: Add frl-enable-gpios to rk3588s boards

The following RK3588s boards expose a GPIO pin to control the voltage
bias on the HDMI0 data lines:

- rk3588s-coolpi-4b
- rk3588s-indiedroid-nova
- rk3588s-nanopi-r6
- rk3588s-odroid-m2
- rk3588s-orangepi-5
- rk3588s-radxa-cm5-io
- rk3588s-rock-5a
- rk3588s-rock-5c

The pin must be asserted when operating in HDMI 2.1 FRL mode and
deasserted for HDMI 1.4/2.0 TMDS mode.

Wire up the hdmi0 node to its dedicated GPIO via frl-enable-gpios to
allow adjusting the bias when transitioning between TMDS and FRL modes.

While at it, also ensure that pinctrl-names is present and ordered
alphabetically within the hdmi nodes.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Link: https://patch.msgid.link/20260428-dts-rk-frl-enable-gpios-v2-5-924df9db884a@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Cristian Ciocaltea 2026-04-28 00:57:23 +03:00 committed by Heiko Stuebner
parent 643d6733e5
commit 3305c44489
8 changed files with 79 additions and 5 deletions

View File

@ -251,6 +251,10 @@ &gpu {
};
&hdmi0 {
frl-enable-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&hdmim0_tx0_cec &hdmim0_tx0_hpd
&hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>;
pinctrl-names = "default";
status = "okay";
};
@ -396,6 +400,12 @@ &pd_gpu {
};
&pinctrl {
hdmi {
hdmi0_tx_on_h: hdmi0-tx-on-h {
rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
hym8563 {
hym8563_int: hym8563-int {
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;

View File

@ -277,8 +277,10 @@ &gpu {
};
&hdmi0 {
frl-enable-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&hdmim0_tx0_scl>, <&hdmim0_tx0_sda>,
<&hdmim0_tx0_hpd>, <&hdmim0_tx0_cec>;
<&hdmim0_tx0_hpd>, <&hdmim0_tx0_cec>,
<&hdmi0_tx_on_h>;
pinctrl-names = "default";
status = "okay";
};
@ -517,6 +519,12 @@ bt_wake_host: bt-wake-host {
};
};
hdmi {
hdmi0_tx_on_h: hdmi0-tx-on-h {
rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
hym8563 {
hym8563_int: hym8563-int {

View File

@ -236,6 +236,10 @@ &gpu {
};
&hdmi0 {
frl-enable-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&hdmim0_tx0_cec &hdmim0_tx0_hpd
&hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>;
pinctrl-names = "default";
status = "okay";
};
@ -404,6 +408,12 @@ lan2_led_pin: lan2-led-pin {
};
};
hdmi {
hdmi0_tx_on_h: hdmi0-tx-on-h {
rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
hym8563 {
rtc_int: rtc-int {
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;

View File

@ -249,6 +249,10 @@ &gpu {
};
&hdmi0 {
frl-enable-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&hdmim0_tx0_cec &hdmim0_tx0_hpd
&hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>;
pinctrl-names = "default";
status = "okay";
};
@ -438,6 +442,12 @@ &pd_gpu {
};
&pinctrl {
hdmi {
hdmi0_tx_on_h: hdmi0-tx-on-h {
rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
lcd {
lcd_pwren: lcd-pwren {
rockchip,pins = <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;

View File

@ -181,6 +181,10 @@ &gpu {
};
&hdmi0 {
frl-enable-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&hdmim0_tx0_cec &hdmim0_tx0_hpd
&hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>;
pinctrl-names = "default";
status = "okay";
};
@ -381,6 +385,12 @@ &pd_npu {
};
&pinctrl {
hdmi {
hdmi0_tx_on_h: hdmi0-tx-on-h {
rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
hym8563 {
hym8563_int: hym8563-int {
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;

View File

@ -120,6 +120,10 @@ &gmac1 {
};
&hdmi0 {
frl-enable-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&hdmim0_tx0_cec &hdmim0_tx0_hpd
&hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>;
pinctrl-names = "default";
status = "okay";
};
@ -217,6 +221,12 @@ usbc0_int: usbc0-int {
};
};
hdmi {
hdmi0_tx_on_h: hdmi0-tx-on-h {
rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
usb {
vcc5v0_host_en: vcc5v0-host-en {
rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;

View File

@ -323,11 +323,13 @@ &gmac1_rgmii_clk
};
&hdmi0 {
pinctrl-names = "default";
frl-enable-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&hdmim0_tx0_cec
&hdmim1_tx0_hpd
&hdmim0_tx0_scl
&hdmim0_tx0_sda>;
&hdmim0_tx0_sda
&hdmi0_tx_on_h>;
pinctrl-names = "default";
status = "okay";
};
@ -373,6 +375,12 @@ &pd_gpu {
};
&pinctrl {
hdmi {
hdmi0_tx_on_h: hdmi0-tx-on-h {
rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
leds {
io_led: io-led {
rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;

View File

@ -258,11 +258,13 @@ &gpu {
};
&hdmi0 {
pinctrl-names = "default";
frl-enable-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&hdmim0_tx0_cec
&hdmim1_tx0_hpd
&hdmim0_tx0_scl
&hdmim0_tx0_sda>;
&hdmim0_tx0_sda
&hdmi0_tx_on_h>;
pinctrl-names = "default";
status = "okay";
};
@ -461,6 +463,12 @@ &pd_gpu {
};
&pinctrl {
hdmi {
hdmi0_tx_on_h: hdmi0-tx-on-h {
rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
leds {
led_pins: led-pins {
rockchip,pins = <3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>,