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arm64: dts: rockchip: Add frl-enable-gpios to rk3588 boards

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The following RK3588 boards expose one or two GPIO pins to control the
voltage bias on the HDMI0 and/or HDMI1 data lines:

- rk3588-armsom-sige7
- rk3588-armsom-w3
- rk3588-coolpi-cm5-evb
- rk3588-coolpi-cm5-genbook
- rk3588-evb1-v10
- rk3588-evb2-v10
- rk3588-firefly-itx-3588j
- rk3588-friendlyelec-cm3588-nas
- rk3588-h96-max-v58
- rk3588-jaguar
- rk3588-mnt-reform2
- rk3588-nanopc-t6
- rk3588-orangepi-5-max
- rk3588-orangepi-5-plus
- rk3588-orangepi-5-ultra
- rk3588-roc-rt
- rk3588-rock-5-itx
- rk3588-rock-5b-5bp-5t
- rk3588-tiger

The pins must be asserted when operating in HDMI 2.1 FRL mode and
deasserted for HDMI 1.4/2.0 TMDS mode.

Wire up the hdmi0 and/or hdmi1 nodes to their dedicated GPIO pin(s) via
frl-enable-gpios to allow adjusting the bias when transitioning between
TMDS and FRL modes.

While at it, also ensure that pinctrl-names is present and ordered
alphabetically within the hdmi nodes.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Link: https://patch.msgid.link/20260428-dts-rk-frl-enable-gpios-v2-4-924df9db884a@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Cristian Ciocaltea 2026-04-28 00:57:22 +03:00 committed by Heiko Stuebner
parent ba0d7cfb98
commit 643d6733e5
20 changed files with 256 additions and 12 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts
View File

@ -177,6 +177,10 @@ &gpu {
};
&hdmi0 {
frl-enable-gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&hdmim0_tx0_cec &hdmim0_tx0_hpd
&hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>;
pinctrl-names = "default";
status = "okay";
};
@ -347,6 +351,12 @@ &pd_gpu {
};
&pinctrl {
hdmi {
hdmi0_tx_on_h: hdmi0-tx-on-h {
rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
hym8563 {
hym8563_int: hym8563-int {
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;

18
arch/arm64/boot/dts/rockchip/rk3588-armsom-w3.dts
View File

@ -162,6 +162,10 @@ &combphy2_psu {
};
&hdmi0 {
frl-enable-gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&hdmim0_tx0_cec &hdmim0_tx0_hpd
&hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>;
pinctrl-names = "default";
status = "okay";
};
@ -182,6 +186,10 @@ &hdmi0_sound {
};
&hdmi1 {
frl-enable-gpios = <&gpio4 RK_PA1 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&hdmim2_tx1_cec &hdmim0_tx1_hpd
&hdmim1_tx1_scl &hdmim1_tx1_sda &hdmi1_tx_on_h>;
pinctrl-names = "default";
status = "okay";
};
@ -330,6 +338,16 @@ &pcie3x4 {
};
&pinctrl {
hdmi {
hdmi0_tx_on_h: hdmi0-tx-on-h {
rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
};
hdmi1_tx_on_h: hdmi1-tx-on-h {
rockchip,pins = <4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
hym8563 {
hym8563_int: hym8563-int {
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;

18
arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-evb.dts
View File

@ -125,6 +125,10 @@ vcc5v0_usb30_otg: regulator-vcc5v0-usb30-otg {
};
&hdmi0 {
frl-enable-gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&hdmim0_tx0_cec &hdmim0_tx0_hpd
&hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>;
pinctrl-names = "default";
status = "okay";
};
@ -145,8 +149,10 @@ hdmi0_out_con: endpoint {
};
&hdmi1 {
frl-enable-gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&hdmim2_tx1_cec &hdmim0_tx1_hpd &hdmim1_tx1_scl &hdmim1_tx1_sda
&hdmi1_tx_on_h>;
pinctrl-names = "default";
pinctrl-0 = <&hdmim2_tx1_cec &hdmim0_tx1_hpd &hdmim1_tx1_scl &hdmim1_tx1_sda>;
status = "okay";
};
@ -211,6 +217,16 @@ &pcie3x4 {
};
&pinctrl {
hdmi {
hdmi0_tx_on_h: hdmi0-tx-on-h {
rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
hdmi1_tx_on_h: hdmi1-tx-on-h {
rockchip,pins = <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
lcd {
lcdpwr_en: lcdpwr-en {
rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_down>;

11
arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-genbook.dts
View File

@ -184,7 +184,10 @@ edp_out_panel: endpoint {
/* HDMI CEC is not used */
&hdmi0 {
pinctrl-0 = <&hdmim0_tx0_hpd &hdmim0_tx0_scl &hdmim0_tx0_sda>;
frl-enable-gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&hdmim0_tx0_hpd &hdmim0_tx0_scl &hdmim0_tx0_sda
&hdmi0_tx_on_h>;
pinctrl-names = "default";
status = "okay";
};
@ -277,6 +280,12 @@ &pcie3x4 {
};
&pinctrl {
hdmi {
hdmi0_tx_on_h: hdmi0-tx-on-h {
rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
lcd {
lcdpwr_en: lcdpwr-en {
rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_down>;

18
arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts
View File

@ -360,6 +360,10 @@ &gpu {
};
&hdmi0 {
frl-enable-gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&hdmim0_tx0_cec &hdmim0_tx0_hpd
&hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>;
pinctrl-names = "default";
status = "okay";
};
@ -376,6 +380,10 @@ hdmi0_out_con: endpoint {
};
&hdmi1 {
frl-enable-gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&hdmim2_tx1_cec &hdmim0_tx1_hpd
&hdmim1_tx1_scl &hdmim1_tx1_sda &hdmi1_tx_on_h>;
pinctrl-names = "default";
status = "okay";
};
@ -612,6 +620,16 @@ rtl8211f_rst: rtl8211f-rst {
};
hdmi {
hdmi0_tx_on_h: hdmi0-tx-on-h {
rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
};
hdmi1_tx_on_h: hdmi1-tx-on-h {
rockchip,pins = <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
hdmirx {
hdmirx_hpd: hdmirx-5v-detection {
rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;

10
arch/arm64/boot/dts/rockchip/rk3588-evb2-v10.dts
View File

@ -143,6 +143,10 @@ &gpu {
};
&hdmi0 {
frl-enable-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&hdmim0_tx0_cec &hdmim0_tx0_hpd
&hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>;
pinctrl-names = "default";
status = "okay";
};
@ -183,6 +187,12 @@ &pd_gpu {
};
&pinctrl {
hdmi {
hdmi0_tx_on_h: hdmi0-tx-on-h {
rockchip,pins = <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
hym8563 {
hym8563_int: hym8563-int {
rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;

10
arch/arm64/boot/dts/rockchip/rk3588-firefly-itx-3588j.dts
View File

@ -322,6 +322,10 @@ &gpu {
};
&hdmi0 {
frl-enable-gpios = <&gpio4 RK_PA0 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&hdmim0_tx0_cec &hdmim0_tx0_hpd
&hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>;
pinctrl-names = "default";
status = "okay";
};
@ -487,6 +491,12 @@ dp1_hpd: dp1-hpd {
};
};
hdmi {
hdmi0_tx_on_h: hdmi0-tx-on-h {
rockchip,pins = <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
hym8563 {
hym8563_int: hym8563-int {
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;

18
arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588-nas.dts
View File

@ -331,6 +331,10 @@ &gpio4 {
};
&hdmi0 {
frl-enable-gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&hdmim0_tx0_cec &hdmim0_tx0_hpd
&hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>;
pinctrl-names = "default";
status = "okay";
};
@ -347,6 +351,10 @@ hdmi0_out_con: endpoint {
};
&hdmi1 {
frl-enable-gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&hdmim2_tx1_cec &hdmim0_tx1_hpd
&hdmim1_tx1_scl &hdmim1_tx1_sda &hdmi1_tx_on_h>;
pinctrl-names = "default";
status = "okay";
};
@ -520,6 +528,16 @@ key1_pin: key1-pin {
};
};
hdmi {
hdmi0_tx_on_h: hdmi0-tx-on-h {
rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
};
hdmi1_tx_on_h: hdmi1-tx-on-h {
rockchip,pins = <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
hdmirx {
hdmirx_hpd: hdmirx-5v-detection {
rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;

10
arch/arm64/boot/dts/rockchip/rk3588-h96-max-v58.dts
View File

@ -210,6 +210,10 @@ &gpu {
};
&hdmi0 {
frl-enable-gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&hdmim0_tx0_cec &hdmim0_tx0_hpd
&hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>;
pinctrl-names = "default";
status = "okay";
};
@ -339,6 +343,12 @@ &pd_gpu {
};
&pinctrl {
hdmi {
hdmi0_tx_on_h: hdmi0-tx-on-h {
rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
hym8563 {
hym8563_int: hym8563-int {
rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;

10
arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts
View File

@ -278,8 +278,10 @@ &gpu {
&hdmi0 {
/* No CEC on Jaguar */
frl-enable-gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&hdmim0_tx0_hpd &hdmim0_tx0_scl &hdmim0_tx0_sda
&hdmi0_tx_on_h>;
pinctrl-names = "default";
pinctrl-0 = <&hdmim0_tx0_hpd &hdmim0_tx0_scl &hdmim0_tx0_sda>;
status = "okay";
};
@ -571,6 +573,12 @@ eth_reset: eth-reset {
};
};
hdmi {
hdmi0_tx_on_h: hdmi0-tx-on-h {
rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
leds {
led1_pin: led1-pin {
rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;

10
arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts
View File

@ -148,6 +148,10 @@ &gpu {
};
&hdmi0 {
frl-enable-gpios = <&gpio4 RK_PA0 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&hdmim0_tx0_cec &hdmim0_tx0_hpd
&hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>;
pinctrl-names = "default";
status = "okay";
};
@ -205,6 +209,12 @@ dp1_hpd: dp1-hpd {
};
};
hdmi {
hdmi0_tx_on_h: hdmi0-tx-on-h {
rockchip,pins = <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pcie2 {
pcie2_0_rst: pcie2-0-rst {
rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;

18
arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
View File

@ -361,6 +361,10 @@ &gpu {
};
&hdmi0 {
frl-enable-gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&hdmim0_tx0_cec &hdmim0_tx0_hpd
&hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>;
pinctrl-names = "default";
status = "okay";
};
@ -381,6 +385,10 @@ &hdmi0_sound {
};
&hdmi1 {
frl-enable-gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&hdmim2_tx1_cec &hdmim0_tx1_hpd
&hdmim1_tx1_scl &hdmim1_tx1_sda &hdmi1_tx_on_h>;
pinctrl-names = "default";
status = "okay";
};
@ -682,6 +690,16 @@ usr_led_pin: usr-led-pin {
};
};
hdmi {
hdmi0_tx_on_h: hdmi0-tx-on-h {
rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
};
hdmi1_tx_on_h: hdmi1-tx-on-h {
rockchip,pins = <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
hdmirx {
hdmirx_hpd: hdmirx-5v-detection {
rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;

18
arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-max.dts
View File

@ -35,6 +35,10 @@ hdmi1_con_in: endpoint {
};
&hdmi0 {
frl-enable-gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&hdmim0_tx0_cec &hdmim0_tx0_hpd
&hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>;
pinctrl-names = "default";
status = "okay";
};
@ -55,9 +59,10 @@ &hdmi0_sound {
};
&hdmi1 {
pinctrl-names = "default";
frl-enable-gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&hdmim0_tx1_cec &hdmim0_tx1_hpd
&hdmim1_tx1_scl &hdmim1_tx1_sda>;
&hdmim1_tx1_scl &hdmim1_tx1_sda &hdmi1_tx_on_h>;
pinctrl-names = "default";
status = "okay";
};
@ -102,6 +107,15 @@ &led_green_pwm {
};
&pinctrl {
hdmi {
hdmi0_tx_on_h: hdmi0-tx-on-h {
rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
};
hdmi1_tx_on_h: hdmi1-tx-on-h {
rockchip,pins = <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
usb {
usb_otg_pwren: usb-otg-pwren {

18
arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts
View File

@ -121,6 +121,10 @@ &fan {
};
&hdmi0 {
frl-enable-gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&hdmim0_tx0_cec &hdmim0_tx0_hpd
&hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>;
pinctrl-names = "default";
status = "okay";
};
@ -141,6 +145,10 @@ hdmi0_out_con: endpoint {
};
&hdmi1 {
frl-enable-gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&hdmim2_tx1_cec &hdmim0_tx1_hpd
&hdmim1_tx1_scl &hdmim1_tx1_sda &hdmi1_tx_on_h>;
pinctrl-names = "default";
status = "okay";
};
@ -278,6 +286,16 @@ &pcie2x1l2 {
};
&pinctrl {
hdmi {
hdmi0_tx_on_h: hdmi0-tx-on-h {
rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
};
hdmi1_tx_on_h: hdmi1-tx-on-h {
rockchip,pins = <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
hym8563 {
hym8563_int: hym8563-int {
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;

11
arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-ultra.dts
View File

@ -25,9 +25,10 @@ hdmi1_con_in: endpoint {
};
&hdmi1 {
pinctrl-names = "default";
frl-enable-gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&hdmim0_tx1_cec &hdmim0_tx1_hpd
&hdmim1_tx1_scl &hdmim1_tx1_sda>;
&hdmim1_tx1_scl &hdmim1_tx1_sda &hdmi1_tx_on_h>;
pinctrl-names = "default";
status = "okay";
};
@ -64,6 +65,12 @@ &led_green_pwm {
};
&pinctrl {
hdmi {
hdmi1_tx_on_h: hdmi1-tx-on-h {
rockchip,pins = <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
usb {
usb_otg_pwren: usb-otg-pwren {
rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;

18
arch/arm64/boot/dts/rockchip/rk3588-roc-rt.dts
View File

@ -325,6 +325,10 @@ &gpu {
};
&hdmi0 {
frl-enable-gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&hdmim0_tx0_cec &hdmim0_tx0_hpd
&hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>;
pinctrl-names = "default";
status = "okay";
};
@ -345,6 +349,10 @@ &hdmi0_sound {
};
&hdmi1 {
frl-enable-gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&hdmim2_tx1_cec &hdmim0_tx1_hpd
&hdmim1_tx1_scl &hdmim1_tx1_sda &hdmi1_tx_on_h>;
pinctrl-names = "default";
status = "okay";
};
@ -583,6 +591,16 @@ led_pins: led-pins {
};
};
hdmi {
hdmi0_tx_on_h: hdmi0-tx-on-h {
rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
hdmi1_tx_on_h: hdmi1-tx-on-h {
rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
hym8563 {
hym8563_int: hym8563-int {
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;

10
arch/arm64/boot/dts/rockchip/rk3588-rock-5-itx.dts
View File

@ -346,8 +346,10 @@ &gpu {
};
&hdmi1 {
frl-enable-gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&hdmim0_tx1_cec &hdmim0_tx1_hpd
&hdmim1_tx1_scl &hdmim1_tx1_sda>;
&hdmim1_tx1_scl &hdmim1_tx1_sda &hdmi1_tx_on_h>;
pinctrl-names = "default";
status = "okay";
};
@ -699,6 +701,12 @@ &pd_npu {
};
&pinctrl {
hdmi {
hdmi1_tx_on_h: hdmi1-tx-on-h {
rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
hym8563 {
rtc_int: rtc-int {
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;

18
arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi
View File

@ -183,6 +183,10 @@ &gpu {
};
&hdmi0 {
frl-enable-gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&hdmim0_tx0_cec &hdmim0_tx0_hpd
&hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>;
pinctrl-names = "default";
status = "okay";
};
@ -203,8 +207,10 @@ &hdmi0_sound {
};
&hdmi1 {
frl-enable-gpios = <&gpio4 RK_PA1 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&hdmim0_tx1_cec &hdmim0_tx1_hpd
&hdmim1_tx1_scl &hdmim1_tx1_sda>;
&hdmim1_tx1_scl &hdmim1_tx1_sda &hdmi1_tx_on_h>;
pinctrl-names = "default";
status = "okay";
};
@ -505,6 +511,16 @@ &pd_npu {
};
&pinctrl {
hdmi {
hdmi0_tx_on_h: hdmi0-tx-on-h {
rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
};
hdmi1_tx_on_h: hdmi1-tx-on-h {
rockchip,pins = <4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
hym8563 {
hym8563_int: hym8563-int {
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;

3
arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou.dts
View File

@ -172,8 +172,9 @@ &hdmi0 {
* While HDMI-CEC is present on the Q7 connector, it is not
* connected on Haikou itself.
*/
pinctrl-0 = <&hdmim0_tx0_hpd &hdmim1_tx0_scl &hdmim1_tx0_sda
&hdmi0_tx_on_h>;
pinctrl-names = "default";
pinctrl-0 = <&hdmim0_tx0_hpd &hdmim1_tx0_scl &hdmim1_tx0_sda>;
status = "okay";
};

11
arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi
View File

@ -148,9 +148,10 @@ &gpu {
};
&hdmi0 {
pinctrl-names = "default";
frl-enable-gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&hdmim1_tx0_cec &hdmim0_tx0_hpd &hdmim1_tx0_scl
&hdmim1_tx0_sda>;
&hdmim1_tx0_sda &hdmi0_tx_on_h>;
pinctrl-names = "default";
};
&i2c1 {
@ -349,6 +350,12 @@ eth_reset: eth-reset {
};
};
hdmi {
hdmi0_tx_on_h: hdmi0-tx-on-h {
rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
leds {
module_led_pin: module-led-pin {
rockchip,pins = <1 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;