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rockchip: sip: sm_nsec_ctx adds fiq spsr, sp and lr

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due to optee os bugfix patch for FIQ:
	cf6a4d8 arm: sm: [bugfix] save/restore fiq core registers

we have to update sm_nsec_ctx to keep same with optee os, otherwise
FIQ debugger "bt" command is abnormal.

Change-Id: I950cfacd1c34abd88fbee2862c593b5fa59387bd
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
This commit is contained in:
Joseph Chen 2018-01-02 19:54:56 +08:00 committed by Tao Huang
parent 07f3a9425f
commit 2d9a3c1125
1 changed files with 3 additions and 0 deletions
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3
include/linux/rockchip/rockchip_sip.h
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@ -205,6 +205,9 @@ struct sm_nsec_ctx {
u32 irq_spsr;
u32 irq_sp;
u32 irq_lr;
u32 fiq_spsr;
u32 fiq_sp;
u32 fiq_lr;
u32 svc_spsr;
u32 svc_sp;
u32 svc_lr;