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ARM: dts: renesas: r8a7740: Add FSI clocks

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Add the SPU bus clock, icka/b functional clocks, and xcka/b external
clock inputs to the FSI device node.
This prepares for subsequent driver changes that explicitly manage the
SPU clock required for FSI register access on R-Mobile A1.

Signed-off-by: bui duc phuc <phucduc.bui@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260609113836.45079-3-phucduc.bui@gmail.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
bui duc phuc 2026-06-09 18:38:27 +07:00 committed by Geert Uytterhoeven
parent e3203a8123
commit 2cc5ac6e85
1 changed files with 11 additions and 1 deletions
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12
arch/arm/boot/dts/renesas/r8a7740.dtsi
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@ -501,7 +501,11 @@ sh_fsi2: sound@fe1f0000 {
compatible = "renesas,fsi2-r8a7740", "renesas,sh_fsi2";
reg = <0xfe1f0000 0x400>;
interrupts = <GIC_SPI 9 0x4>;
clocks = <&mstp3_clks R8A7740_CLK_FSI>;
clocks = <&mstp3_clks R8A7740_CLK_FSI>, <&spu_clk>,
<&fsia_clk>, <&fsib_clk>, <&fsiack_clk>,
<&fsibck_clk>;
clock-names = "fck", "spu", "icka", "ickb", "xcka",
"xckb";
power-domains = <&pd_a4mp>;
status = "disabled";
};
@ -722,6 +726,12 @@ vou_clk: vou@e6150088 {
<0>;
#clock-cells = <0>;
};
fsib_clk: fsib@e6150090 {
compatible = "renesas,r8a7740-div6-clock", "renesas,cpg-div6-clock";
reg = <0xe6150090 4>;
clocks = <&pllc1_div2_clk>, <&fsibck_clk>, <0>, <0>;
#clock-cells = <0>;
};
stpro_clk: stpro@e615009c {
compatible = "renesas,r8a7740-div6-clock", "renesas,cpg-div6-clock";
reg = <0xe615009c 4>;