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arm64: dts: add description for solidrun imx8mp hummingboard variants
Add descriptions for the SolidRun i.MX8M Plus System on Module based HummingBoard product-line. They share a common designed based on the "Pulse" version, defined by various assembly options. The HummingBoard Pulse features: - 2x RJ45 Ethernet - 2x USB-3.0 Type A - HDMI connector - mini-HDMI connector - microSD connector - mini-PCI-E connector with SIM slot supporting USB-2.0/3.0 interfaces - M.2 connector with SIM slot supporting USB-2.0/3.0 interfaces - MIPI-CSI Camera Connector (not described without specific camera) - 3.5mm Analog Stereo Out / Microphone In Headphone Jack - RTC with backup battery The variants Mate and Ripple are reduced versions of Pulse. The HummingBoard Pro extends Pulse with PCI-E on M.2 connector. Signed-off-by: Josua Mayer <josua@solid-run.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Josua Mayer
Shawn Guo
parent
40ded2d12b
commit
2a222aa2be
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@ -206,6 +206,10 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-pdk3.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-picoitx.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-edm-g-wb.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-hummingboard-mate.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-hummingboard-pro.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-hummingboard-pulse.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-hummingboard-ripple.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-icore-mx8mp-edimm2.2.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-iota2-lumpy.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-kontron-bl-osm-s.dtb
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31
arch/arm64/boot/dts/freescale/imx8mp-hummingboard-mate.dts
Normal file
31
arch/arm64/boot/dts/freescale/imx8mp-hummingboard-mate.dts
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@ -0,0 +1,31 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright 2025 Josua Mayer <josua@solid-run.com>
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*/
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/dts-v1/;
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#include "imx8mp-sr-som.dtsi"
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#include "imx8mp-hummingboard-pulse-common.dtsi"
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#include "imx8mp-hummingboard-pulse-hdmi.dtsi"
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/ {
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model = "SolidRun i.MX8MP HummingBoard Mate";
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compatible = "solidrun,imx8mp-hummingboard-mate",
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"solidrun,imx8mp-sr-som", "fsl,imx8mp";
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aliases {
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ethernet0 = &eqos;
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/delete-property/ ethernet1;
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};
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};
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&fec {
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/* this board does not use second phy / ethernet on SoM */
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status = "disabled";
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};
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&iomuxc {
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pinctrl-names = "default";
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pinctrl-0 = <&mikro_pwm_pins>, <&mikro_int_pins>, <&mikro_rst_pins>;
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};
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76
arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pro.dts
Normal file
76
arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pro.dts
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@ -0,0 +1,76 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright 2025 Josua Mayer <josua@solid-run.com>
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*/
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/dts-v1/;
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#include <dt-bindings/phy/phy-imx8-pcie.h>
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#include "imx8mp-sr-som.dtsi"
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#include "imx8mp-hummingboard-pulse-codec.dtsi"
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#include "imx8mp-hummingboard-pulse-common.dtsi"
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#include "imx8mp-hummingboard-pulse-hdmi.dtsi"
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#include "imx8mp-hummingboard-pulse-m2con.dtsi"
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#include "imx8mp-hummingboard-pulse-mini-hdmi.dtsi"
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/ {
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model = "SolidRun i.MX8MP HummingBoard Pro";
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compatible = "solidrun,imx8mp-hummingboard-pro",
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"solidrun,imx8mp-sr-som", "fsl,imx8mp";
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aliases {
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ethernet0 = &eqos;
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ethernet1 = &fec;
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};
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};
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&iomuxc {
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pinctrl-names = "default";
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pinctrl-0 = <&mikro_pwm_pins>, <&mikro_int_pins>, <&hdmi_pins>,
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<&m2_wwan_wake_pins>;
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};
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&pcie {
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pinctrl-0 = <&m2_reset_pins>;
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pinctrl-names = "default";
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reset-gpio = <&gpio1 6 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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&pcie_phy {
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clocks = <&hsio_blk_ctrl>;
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clock-names = "ref";
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fsl,clkreq-unsupported;
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fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_OUTPUT>;
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status = "okay";
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};
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&phy0 {
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leds {
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/* ADIN1300 LED_0 pin */
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led@0 {
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reg = <0>;
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color = <LED_COLOR_ID_ORANGE>;
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function = LED_FUNCTION_LAN;
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default-state = "keep";
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};
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/delete-node/ led@1;
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};
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};
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&phy1 {
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leds {
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#address-cells = <1>;
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#size-cells = <0>;
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/* ADIN1300 LED_0 pin */
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led@0 {
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reg = <0>;
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_LAN;
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default-state = "keep";
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};
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};
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};
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@ -0,0 +1,59 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright 2025 Josua Mayer <josua@solid-run.com>
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*/
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/ {
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sound-wm8904 {
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compatible = "fsl,imx-audio-wm8904";
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model = "audio-wm8904";
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audio-cpu = <&sai3>;
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audio-codec = <&codec>;
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audio-routing =
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"Headphone Jack", "HPOUTL",
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"Headphone Jack", "HPOUTR",
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"AMIC", "MICBIAS",
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"IN2R", "AMIC";
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};
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};
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&i2c2 {
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codec: audio-codec@1a {
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compatible = "wlf,wm8904";
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reg = <0x1a>;
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#sound-dai-cells = <0>;
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clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI3_MCLK1>;
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clock-names = "mclk";
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AVDD-supply = <&v_1_8>;
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CPVDD-supply = <&v_1_8>;
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DBVDD-supply = <&v_3_3>;
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DCVDD-supply = <&v_1_8>;
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MICVDD-supply = <&v_3_3>;
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};
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};
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&iomuxc {
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sai3_pins: pinctrl-sai3-grp {
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fsl,pins = <
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MX8MP_IOMUXC_SAI3_MCLK__AUDIOMIX_SAI3_MCLK 0xd6
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MX8MP_IOMUXC_SAI3_TXFS__AUDIOMIX_SAI3_TX_SYNC 0xd6
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MX8MP_IOMUXC_SAI3_TXC__AUDIOMIX_SAI3_TX_BCLK 0xd6
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MX8MP_IOMUXC_SAI3_TXD__AUDIOMIX_SAI3_TX_DATA00 0xd6
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MX8MP_IOMUXC_SAI3_RXD__AUDIOMIX_SAI3_RX_DATA00 0xd6
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>;
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};
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};
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&sai3 {
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pinctrl-names = "default";
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pinctrl-0 = <&sai3_pins>;
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assigned-clocks = <&clk IMX8MP_CLK_SAI3>;
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assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
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assigned-clock-rates = <12288000>;
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clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI3_IPG>, <&clk IMX8MP_CLK_DUMMY>,
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<&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI3_MCLK1>, <&clk IMX8MP_CLK_DUMMY>,
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<&clk IMX8MP_CLK_DUMMY>;
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clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
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fsl,sai-mclk-direction-output;
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status = "okay";
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};
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@ -0,0 +1,384 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright 2025 Josua Mayer <josua@solid-run.com>
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*/
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#include <dt-bindings/leds/common.h>
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/ {
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aliases {
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rtc0 = &carrier_rtc;
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rtc1 = &snvs_rtc;
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&led_pins>;
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led-0 {
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label = "D30";
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color = <LED_COLOR_ID_GREEN>;
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gpios = <&gpio5 28 GPIO_ACTIVE_LOW>;
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default-state = "on";
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};
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led-1 {
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label = "D31";
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color = <LED_COLOR_ID_GREEN>;
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gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
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default-state = "on";
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};
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led-2 {
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label = "D32";
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color = <LED_COLOR_ID_GREEN>;
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gpios = <&gpio4 23 GPIO_ACTIVE_LOW>;
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default-state = "on";
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};
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led-3 {
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label = "D33";
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color = <LED_COLOR_ID_GREEN>;
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gpios = <&gpio4 21 GPIO_ACTIVE_LOW>;
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default-state = "on";
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};
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led-4 {
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label = "D34";
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color = <LED_COLOR_ID_GREEN>;
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gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
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default-state = "on";
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};
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};
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rfkill-mpcie-wifi {
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/*
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* The mpcie connector only has USB,
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* therefore this rfkill is for cellular radios only.
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*/
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compatible = "rfkill-gpio";
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pinctrl-names = "default";
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pinctrl-0 = <&mpcie_rfkill_pins>;
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label = "mpcie radio";
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radio-type = "wwan";
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/* rfkill-gpio inverts internally */
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shutdown-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
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};
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vmmc: regulator-mmc {
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compatible = "regulator-fixed";
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pinctrl-names = "default";
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pinctrl-0 = <&vmmc_pins>;
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regulator-name = "vmmc";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
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startup-delay-us = <250>;
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};
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vbus1: regulator-vbus-1 {
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compatible = "regulator-fixed";
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regulator-name = "vbus1";
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gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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pinctrl-names = "default";
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pinctrl-0 = <&vbus1_pins>;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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};
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vbus2: regulator-vbus-2 {
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compatible = "regulator-fixed";
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regulator-name = "vbus2";
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gpio = <&gpio1 15 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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pinctrl-names = "default";
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pinctrl-0 = <&vbus2_pins>;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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};
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v_1_2: regulator-1-2 {
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compatible = "regulator-fixed";
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regulator-name = "1v2";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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};
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vmpcie {
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/* supplies mpcie and m2 connectors */
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compatible = "regulator-fixed";
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regulator-name = "vmpcie";
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gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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pinctrl-names = "default";
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pinctrl-0 = <&vmpcie_pins>;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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};
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/* mikrobus spi */
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&ecspi2 {
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num-cs = <1>;
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pinctrl-names = "default";
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pinctrl-0 = <&mikro_spi_pins>;
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status = "okay";
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};
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&gpio1 {
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pinctrl-0 = <&mpcie_reset_pins>;
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pinctrl-names = "default";
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mpcie-reset-hog {
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gpio-hog;
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gpios = <1 GPIO_ACTIVE_LOW>;
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output-low;
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line-name = "mpcie-reset";
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};
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};
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&i2c3 {
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carrier_eeprom: eeprom@57{
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compatible = "st,24c02", "atmel,24c02";
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reg = <0x57>;
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pagesize = <16>;
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};
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carrier_rtc: rtc@69 {
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compatible = "abracon,ab1805";
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reg = <0x69>;
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abracon,tc-diode = "schottky";
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abracon,tc-resistor = <3>;
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};
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};
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&iomuxc {
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csi_pins: pinctrl-csi-grp {
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fsl,pins = <
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/* Pin 24: STROBE */
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MX8MP_IOMUXC_NAND_DATA01__GPIO3_IO07 0x0
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>;
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};
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led_pins: pinctrl-led-grp {
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fsl,pins = <
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MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22 0x0
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MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21 0x0
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MX8MP_IOMUXC_SAI2_RXD0__GPIO4_IO23 0x0
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MX8MP_IOMUXC_SAI2_TXFS__GPIO4_IO24 0x0
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MX8MP_IOMUXC_UART4_RXD__GPIO5_IO28 0x0
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>;
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};
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mikro_int_pins: pinctrl-mikro-int-grp {
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fsl,pins = <
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MX8MP_IOMUXC_ECSPI1_SS0__GPIO5_IO09 0x0
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>;
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};
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mikro_pwm_pins: pinctrl-mikro-pwm-grp {
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fsl,pins = <
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MX8MP_IOMUXC_ECSPI1_MISO__GPIO5_IO08 0x0
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>;
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};
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mikro_rst_pins: pinctrl-mikro-rst-grp {
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fsl,pins = <
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MX8MP_IOMUXC_SAI3_RXD__GPIO4_IO30 0x0
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>;
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};
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mikro_spi_pins: pinctrl-mikro-spi-grp {
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fsl,pins = <
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MX8MP_IOMUXC_ECSPI2_SS0__ECSPI2_SS0 0x40000
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MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK 0x82
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MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x82
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MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x82
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>;
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};
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mikro_uart_pins: pinctrl-mikro-uart-grp {
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fsl,pins = <
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MX8MP_IOMUXC_ECSPI1_SCLK__UART3_DCE_RX 0x140
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MX8MP_IOMUXC_ECSPI1_MOSI__UART3_DCE_TX 0x140
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>;
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};
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mpcie_reset_pins: pinctrl-mpcie-reset-grp {
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fsl,pins = <
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MX8MP_IOMUXC_GPIO1_IO01__GPIO1_IO01 0x0
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>;
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};
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mpcie_rfkill_pins: pinctrl-pcie-rfkill-grp {
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fsl,pins = <
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/* weak i/o, open drain */
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MX8MP_IOMUXC_GPIO1_IO05__GPIO1_IO05 0x20
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>;
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};
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usb_hub_pins: pinctrl-usb-hub-grp {
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fsl,pins = <
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MX8MP_IOMUXC_GPIO1_IO11__GPIO1_IO11 0x0
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>;
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||||
};
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usdhc2_pins: pinctrl-usdhc2-grp {
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fsl,pins = <
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MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x190
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MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d0
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MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d0
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MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d0
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MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d0
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MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d0
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MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0x140
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MX8MP_IOMUXC_SD2_CD_B__USDHC2_CD_B 0x140
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||||
>;
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||||
};
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|
||||
usdhc2_100mhz_pins: pinctrl-usdhc2-100mhz-grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x194
|
||||
MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d4
|
||||
MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4
|
||||
MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4
|
||||
MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4
|
||||
MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4
|
||||
MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0x140
|
||||
MX8MP_IOMUXC_SD2_CD_B__USDHC2_CD_B 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
usdhc2_200mhz_pins: pinctrl-usdhc2-200mhz-grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x196
|
||||
MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d6
|
||||
MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d6
|
||||
MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d6
|
||||
MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d6
|
||||
MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d6
|
||||
MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0x140
|
||||
MX8MP_IOMUXC_SD2_CD_B__USDHC2_CD_B 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
vbus1_pins: pinctrl-vbus-1-grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_GPIO1_IO14__GPIO1_IO14 0x20
|
||||
>;
|
||||
};
|
||||
|
||||
vbus2_pins: pinctrl-vbus-2-grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_GPIO1_IO15__GPIO1_IO15 0x20
|
||||
>;
|
||||
};
|
||||
|
||||
vmmc_pins: pinctrl-vmmc-grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x41
|
||||
>;
|
||||
};
|
||||
|
||||
vmpcie_pins: pinctrl-vmpcie-grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10 0x0
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&phy0 {
|
||||
leds {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
/* ADIN1300 LED_0 pin */
|
||||
led@0 {
|
||||
reg = <0>;
|
||||
color = <LED_COLOR_ID_ORANGE>;
|
||||
function = LED_FUNCTION_LAN;
|
||||
default-state = "keep";
|
||||
};
|
||||
|
||||
/* ADIN1300 LINK_ST pin */
|
||||
led@1 {
|
||||
reg = <1>;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
function = LED_FUNCTION_LAN;
|
||||
default-state = "keep";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&snvs_pwrkey {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* mikrobus uart */
|
||||
&uart3 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb3_phy0 {
|
||||
fsl,phy-tx-preemp-amp-tune-microamp = <1200>;
|
||||
vbus-supply = <&vbus2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb3_0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb3_phy1 {
|
||||
vbus-supply = <&vbus1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb3_1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_dwc3_0 {
|
||||
dr_mode = "host";
|
||||
};
|
||||
|
||||
&usb_dwc3_1 {
|
||||
dr_mode = "host";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&usb_hub_pins>;
|
||||
|
||||
hub_2_0: hub@1 {
|
||||
compatible = "usb4b4,6502", "usb4b4,6506";
|
||||
reg = <1>;
|
||||
peer-hub = <&hub_3_0>;
|
||||
reset-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
|
||||
vdd-supply = <&v_1_2>;
|
||||
vdd2-supply = <&v_3_3>;
|
||||
};
|
||||
|
||||
hub_3_0: hub@2 {
|
||||
compatible = "usb4b4,6500", "usb4b4,6504";
|
||||
reg = <2>;
|
||||
peer-hub = <&hub_2_0>;
|
||||
reset-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
|
||||
vdd-supply = <&v_1_2>;
|
||||
vdd2-supply = <&v_3_3>;
|
||||
};
|
||||
};
|
||||
|
||||
&usdhc2 {
|
||||
pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
||||
pinctrl-0 = <&usdhc2_pins>;
|
||||
pinctrl-1 = <&usdhc2_100mhz_pins>;
|
||||
pinctrl-2 = <&usdhc2_200mhz_pins>;
|
||||
vmmc-supply = <&vmmc>;
|
||||
bus-width = <4>;
|
||||
cap-power-off-card;
|
||||
full-pwr-cycle;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -0,0 +1,44 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright 2025 Josua Mayer <josua@solid-run.com>
|
||||
*/
|
||||
|
||||
/ {
|
||||
sound-hdmi {
|
||||
compatible = "fsl,imx-audio-hdmi";
|
||||
model = "audio-hdmi";
|
||||
audio-cpu = <&aud2htx>;
|
||||
hdmi-out;
|
||||
};
|
||||
};
|
||||
|
||||
&aud2htx {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&hdmi_pvi {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&hdmi_tx {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&hdmi_tx_phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
hdmi_pins: pinctrl-hdmi-grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL 0x400001c3
|
||||
MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA 0x400001c3
|
||||
MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC 0x154
|
||||
MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD 0x154
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&lcdif3 {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -0,0 +1,60 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright 2025 Josua Mayer <josua@solid-run.com>
|
||||
*/
|
||||
|
||||
/ {
|
||||
rfkill-m2-gnss {
|
||||
compatible = "rfkill-gpio";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&m2_gnss_rfkill_pins>;
|
||||
label = "m.2 GNSS";
|
||||
radio-type = "gps";
|
||||
/* rfkill-gpio inverts internally */
|
||||
shutdown-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
/* M.2 is B-keyed, so w-disable is for WWAN */
|
||||
rfkill-m2-wwan {
|
||||
compatible = "rfkill-gpio";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&m2_wwan_rfkill_pins>;
|
||||
label = "m.2 WWAN";
|
||||
radio-type = "wwan";
|
||||
/* rfkill-gpio inverts internally */
|
||||
shutdown-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
m2_gnss_rfkill_pins: pinctrl-m2-gnss-rfkill-grp {
|
||||
fsl,pins = <
|
||||
/* weak i/o, open drain */
|
||||
MX8MP_IOMUXC_GPIO1_IO07__GPIO1_IO07 0x20
|
||||
>;
|
||||
};
|
||||
|
||||
m2_reset_pins: pinctrl-m2-reset-grp {
|
||||
fsl,pins = <
|
||||
/*
|
||||
* 3.3V domain on SoC, set open-drain to ensure
|
||||
* 1.8V logic on connector
|
||||
*/
|
||||
MX8MP_IOMUXC_GPIO1_IO06__GPIO1_IO06 0x20
|
||||
>;
|
||||
};
|
||||
|
||||
m2_wwan_rfkill_pins: pinctrl-m2-wwan-rfkill-grp {
|
||||
fsl,pins = <
|
||||
/* weak i/o, open drain */
|
||||
MX8MP_IOMUXC_GPIO1_IO13__GPIO1_IO13 0x20
|
||||
>;
|
||||
};
|
||||
|
||||
m2_wwan_wake_pins: pinctrl-m2-wwan-wake-grp {
|
||||
fsl,pins = <
|
||||
/* weak i/o, open drain */
|
||||
MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12 0x20
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,81 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright 2025 Josua Mayer <josua@solid-run.com>
|
||||
*/
|
||||
|
||||
/ {
|
||||
hdmi-connector {
|
||||
compatible = "hdmi-connector";
|
||||
label = "hdmi";
|
||||
type = "c";
|
||||
|
||||
port {
|
||||
hdmi_connector_in: endpoint {
|
||||
remote-endpoint = <&adv7535_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
hdmi@3d {
|
||||
compatible = "adi,adv7535";
|
||||
reg = <0x3d>, <0x3f>, <0x3c>, <0x38>;
|
||||
reg-names = "main", "edid", "cec", "packet";
|
||||
adi,dsi-lanes = <4>;
|
||||
avdd-supply = <&v_1_8>;
|
||||
dvdd-supply = <&v_1_8>;
|
||||
pvdd-supply = <&v_1_8>;
|
||||
a2vdd-supply = <&v_1_8>;
|
||||
v3p3-supply = <&v_3_3>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mini_hdmi_pins>;
|
||||
interrupt-parent = <&gpio4>;
|
||||
interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
|
||||
adv7535_from_dsim: endpoint {
|
||||
remote-endpoint = <&dsim_to_adv7535>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
|
||||
adv7535_out: endpoint {
|
||||
remote-endpoint = <&hdmi_connector_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
mini_hdmi_pins: pinctrl-mini-hdmi-grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI2_MCLK__GPIO4_IO27 0x0
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&lcdif1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mipi_dsi {
|
||||
samsung,esc-clock-frequency = <10000000>;
|
||||
status = "okay";
|
||||
|
||||
port@1 {
|
||||
dsim_to_adv7535: endpoint {
|
||||
remote-endpoint = <&adv7535_from_dsim>;
|
||||
attach-bridge;
|
||||
};
|
||||
};
|
||||
};
|
||||
83
arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse.dts
Normal file
83
arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse.dts
Normal file
|
|
@ -0,0 +1,83 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright 2025 Josua Mayer <josua@solid-run.com>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <dt-bindings/phy/phy-imx8-pcie.h>
|
||||
|
||||
#include "imx8mp-sr-som.dtsi"
|
||||
#include "imx8mp-hummingboard-pulse-codec.dtsi"
|
||||
#include "imx8mp-hummingboard-pulse-common.dtsi"
|
||||
#include "imx8mp-hummingboard-pulse-hdmi.dtsi"
|
||||
#include "imx8mp-hummingboard-pulse-m2con.dtsi"
|
||||
#include "imx8mp-hummingboard-pulse-mini-hdmi.dtsi"
|
||||
|
||||
/ {
|
||||
model = "SolidRun i.MX8MP HummingBoard Pulse";
|
||||
compatible = "solidrun,imx8mp-hummingboard-pulse",
|
||||
"solidrun,imx8mp-sr-som", "fsl,imx8mp";
|
||||
|
||||
aliases {
|
||||
ethernet0 = &eqos;
|
||||
ethernet1 = &pcie_eth;
|
||||
};
|
||||
};
|
||||
|
||||
&fec {
|
||||
/* this board does not use second phy / ethernet on SoM */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&gpio1 {
|
||||
pinctrl-0 = <&mpcie_reset_pins>, <&m2_reset_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
m2-reset-hog {
|
||||
gpio-hog;
|
||||
gpios = <6 GPIO_ACTIVE_LOW>;
|
||||
output-low;
|
||||
line-name = "m2-reset";
|
||||
};
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mikro_pwm_pins>, <&mikro_int_pins>, <&hdmi_pins>,
|
||||
<&m2_wwan_wake_pins>;
|
||||
|
||||
pcie_eth_pins: pinctrl-pcie-eth-grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0x0
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&pcie {
|
||||
pinctrl-0 = <&pcie_eth_pins>;
|
||||
pinctrl-names = "default";
|
||||
reset-gpio = <&gpio4 28 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
|
||||
root@0,0 {
|
||||
compatible = "pci16c3,abcd";
|
||||
reg = <0x00000000 0 0 0 0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
|
||||
/* Intel i210 */
|
||||
pcie_eth: ethernet@1,0 {
|
||||
compatible = "pci8086,157b";
|
||||
reg = <0x00010000 0 0 0 0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pcie_phy {
|
||||
clocks = <&hsio_blk_ctrl>;
|
||||
clock-names = "ref";
|
||||
fsl,clkreq-unsupported;
|
||||
fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_OUTPUT>;
|
||||
status = "okay";
|
||||
};
|
||||
31
arch/arm64/boot/dts/freescale/imx8mp-hummingboard-ripple.dts
Normal file
31
arch/arm64/boot/dts/freescale/imx8mp-hummingboard-ripple.dts
Normal file
|
|
@ -0,0 +1,31 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright 2025 Josua Mayer <josua@solid-run.com>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "imx8mp-sr-som.dtsi"
|
||||
#include "imx8mp-hummingboard-pulse-common.dtsi"
|
||||
#include "imx8mp-hummingboard-pulse-mini-hdmi.dtsi"
|
||||
|
||||
/ {
|
||||
model = "SolidRun i.MX8MP HummingBoard Ripple";
|
||||
compatible = "solidrun,imx8mp-hummingboard-ripple",
|
||||
"solidrun,imx8mp-sr-som", "fsl,imx8mp";
|
||||
|
||||
aliases {
|
||||
ethernet0 = &eqos;
|
||||
/delete-property/ ethernet1;
|
||||
};
|
||||
};
|
||||
|
||||
&fec {
|
||||
/* this board does not use second phy / ethernet on SoM */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mikro_pwm_pins>, <&mikro_int_pins>, <&mikro_rst_pins>;
|
||||
};
|
||||
Loading…
Reference in New Issue
Block a user