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arm64: dts: imx8mm-phycore-som: optimize drive strengh

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Reduce ENET pin drive strength from X6 to X4 to optimize signal
quality and reduce potential signal integrity issues.

Signed-off-by: Jan Remmet <j.remmet@phytec.de>
Reviewed-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Jan Remmet 2025-09-10 08:17:39 +02:00 committed by Shawn Guo
parent e0c1a76b8d
commit 40ded2d12b
1 changed files with 4 additions and 4 deletions
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8
arch/arm64/boot/dts/freescale/imx8mm-phycore-som.dtsi
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@ -340,10 +340,10 @@ MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x90
MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x90
MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x16
MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x16
MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x16
MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x16
MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x16
MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x16
MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x12
MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x12
MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x12
MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x12
MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x10
>;
};