mirror of
https://github.com/torvalds/linux.git
synced 2026-11-07 06:17:02 +01:00
serial: sc16is7xx: declare MCR and IER as volatile registers
MCR register has the same address as XON1 register.
IER register has the same address as DLH register.
Which register is accessed depends on bits configuration in some
other registers.
To prevent potential access errors, declare MCR and IER as volatile
registers.
Fixes: dfeae619d7 ("serial: sc16is7xx")
Cc: stable@kernel.org
Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Link: https://patch.msgid.link/20261006192540.234402-1-hugo@hugovil.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
parent
831e5c42fd
commit
1c41d09dcd
|
|
@ -501,7 +501,9 @@ static bool sc16is7xx_regmap_volatile(struct device *dev, unsigned int reg)
|
|||
{
|
||||
switch (reg) {
|
||||
case SC16IS7XX_RHR_REG: /* Shared address space with THR & DLL */
|
||||
case SC16IS7XX_IER_REG: /* Shared address space with DLH */
|
||||
case SC16IS7XX_IIR_REG: /* Shared address space with FCR & EFR */
|
||||
case SC16IS7XX_MCR_REG: /* Shared address space with XON1 */
|
||||
case SC16IS7XX_LSR_REG: /* Shared address space with XON2 */
|
||||
case SC16IS7XX_MSR_REG: /* Shared address space with TCR & XOFF1 */
|
||||
case SC16IS7XX_SPR_REG: /* Shared address space with TLR & XOFF2 */
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user