From 1c41d09dcd07ee9648e20aa8238e404c2e6a12fb Mon Sep 17 00:00:00 2001 From: Hugo Villeneuve Date: Tue, 6 Oct 2026 15:25:37 -0400 Subject: [PATCH] serial: sc16is7xx: declare MCR and IER as volatile registers MCR register has the same address as XON1 register. IER register has the same address as DLH register. Which register is accessed depends on bits configuration in some other registers. To prevent potential access errors, declare MCR and IER as volatile registers. Fixes: dfeae619d781 ("serial: sc16is7xx") Cc: stable@kernel.org Signed-off-by: Hugo Villeneuve Link: https://patch.msgid.link/20261006192540.234402-1-hugo@hugovil.com Signed-off-by: Greg Kroah-Hartman --- drivers/tty/serial/sc16is7xx.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/tty/serial/sc16is7xx.c b/drivers/tty/serial/sc16is7xx.c index 7ddc8a38adab..fba588559595 100644 --- a/drivers/tty/serial/sc16is7xx.c +++ b/drivers/tty/serial/sc16is7xx.c @@ -501,7 +501,9 @@ static bool sc16is7xx_regmap_volatile(struct device *dev, unsigned int reg) { switch (reg) { case SC16IS7XX_RHR_REG: /* Shared address space with THR & DLL */ + case SC16IS7XX_IER_REG: /* Shared address space with DLH */ case SC16IS7XX_IIR_REG: /* Shared address space with FCR & EFR */ + case SC16IS7XX_MCR_REG: /* Shared address space with XON1 */ case SC16IS7XX_LSR_REG: /* Shared address space with XON2 */ case SC16IS7XX_MSR_REG: /* Shared address space with TCR & XOFF1 */ case SC16IS7XX_SPR_REG: /* Shared address space with TLR & XOFF2 */