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dt-bindings: riscv: add Smcntrpmf ISA extension description

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Add the description for Smcntrpmf ISA extension

Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Link: https://patch.msgid.link/20260807-counter_delegation-v9-7-58658104e487@meta.com
Signed-off-by: Paul Walmsley <pjw@kernel.org>
This commit is contained in:
Atish Patra 2026-08-07 19:24:31 -06:00 committed by Paul Walmsley
parent 9e35091314
commit 1c40a2d06d
1 changed files with 6 additions and 0 deletions
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6
Documentation/devicetree/bindings/riscv/extensions.yaml
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@ -181,6 +181,12 @@ properties:
changes to interrupts as frozen at commit ccbddab ("Merge pull
request #42 from riscv/jhauser-2023-RC4") of riscv-aia.
- const: smcntrpmf
description: |
The standard Smcntrpmf machine-level extension for the machine mode
to enable privilege mode filtering for cycle and instret counters as
ratified in the 20240326 version of the privileged ISA specification.
- const: smcsrind
description: |
The standard Smcsrind machine-level extension extends the