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ARM: dts: renesas: r9a06g032: Describe I2C controllers

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To match the documentation and schematics, they are numbered from 1 and
not from 0.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250328153134.2881-8-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Wolfram Sang 2025-03-28 16:31:34 +01:00 committed by Geert Uytterhoeven
parent 969875bce3
commit 182f0dc5f5
1 changed files with 22 additions and 0 deletions
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arch/arm/boot/dts/renesas/r9a06g032.dtsi
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@ -268,6 +268,28 @@ uart7: serial@50004000 {
status = "disabled";
};
i2c1: i2c@40063000 {
compatible = "renesas,r9a06g032-i2c", "renesas,rzn1-i2c", "snps,designware-i2c";
reg = <0x40063000 0x100>;
interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&sysctrl R9A06G032_HCLK_I2C0>, <&sysctrl R9A06G032_CLK_I2C0>;
clock-names = "ref", "pclk";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c2: i2c@40064000 {
compatible = "renesas,r9a06g032-i2c", "renesas,rzn1-i2c", "snps,designware-i2c";
reg = <0x40064000 0x100>;
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&sysctrl R9A06G032_HCLK_I2C1>, <&sysctrl R9A06G032_CLK_I2C1>;
clock-names = "ref", "pclk";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
pinctrl: pinctrl@40067000 {
compatible = "renesas,r9a06g032-pinctrl", "renesas,rzn1-pinctrl";
reg = <0x40067000 0x1000>, <0x51000000 0x480>;