github-mirror/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-06-05 04:56:13 +02:00
Code Issues Actions Packages Projects Releases Wiki Activity Graph

ARM: dts: renesas: Add r9a06g032-rzn1d400-eb board device-tree

Browse Source 
The EB board (Expansion board) supports both RZ/N1D and RZ-N1S. Since this
configuration targets only the RZ/N1D, it is named r9a06g032-rzn1d400-eb.
It adds support for the 2 additional switch ports (port C and D) that are
available on that board.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
[Thomas: move the DTS to the Renesas directory, declare the PHY LEDs]
Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Tested-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/20250324-rzn1d400-eb-v4-1-d7ebbbad1918@bootlin.com
[wsa: Correct LAN LED nodes]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250411095425.1842-2-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Clément Léger 2025-03-24 15:50:44 +01:00 committed by Geert Uytterhoeven
parent 1a9c17399d
commit 969875bce3
2 changed files with 131 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm/boot/dts/renesas/Makefile
View File

@ -30,4 +30,5 @@ dtb-$(CONFIG_ARCH_RENESAS) += \
r8a7794-alt.dtb \
r8a7794-silk.dtb \
r9a06g032-rzn1d400-db.dtb \
r9a06g032-rzn1d400-eb.dtb \
sh73a0-kzm9g.dtb

130
arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts Normal file
View File

@ -0,0 +1,130 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for the RZN1D-EB Board
*
* Copyright (C) 2023 Schneider-Electric
*
*/
#include <dt-bindings/leds/common.h>
#include "r9a06g032-rzn1d400-db.dts"
/ {
model = "RZN1D-EB Board";
compatible = "renesas,rzn1d400-eb", "renesas,rzn1d400-db",
"renesas,r9a06g032";
};
&mii_conv2 {
renesas,miic-input = <MIIC_SWITCH_PORTD>;
status = "okay";
};
&mii_conv3 {
renesas,miic-input = <MIIC_SWITCH_PORTC>;
status = "okay";
};
&pinctrl {
pins_eth1: pins-eth1 {
pinmux = <RZN1_PINMUX(12, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(13, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(14, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(15, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(16, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(17, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(18, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(19, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(20, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(21, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(22, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(23, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>;
drive-strength = <6>;
bias-disable;
};
pins_eth2: pins-eth2 {
pinmux = <RZN1_PINMUX(24, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(25, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(26, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(27, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(28, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(29, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(30, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(31, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(32, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(33, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(34, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(35, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>;
drive-strength = <6>;
bias-disable;
};
};
&switch {
pinctrl-0 = <&pins_eth1>, <&pins_eth2>, <&pins_eth3>, <&pins_eth4>,
<&pins_mdio1>;
mdio {
/* CN15 and CN16 switches must be configured in MDIO2 mode */
switch0phy1: ethernet-phy@1 {
reg = <1>;
leds {
#address-cells = <1>;
#size-cells = <0>;
led@0 {
reg = <0>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
default-state = "keep";
};
led@1 {
reg = <1>;
color = <LED_COLOR_ID_ORANGE>;
function = LED_FUNCTION_ACTIVITY;
default-state = "keep";
};
};
};
switch0phy10: ethernet-phy@10 {
reg = <10>;
leds {
#address-cells = <1>;
#size-cells = <0>;
led@0 {
reg = <0>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
default-state = "keep";
};
led@1 {
reg = <1>;
color = <LED_COLOR_ID_ORANGE>;
function = LED_FUNCTION_ACTIVITY;
default-state = "keep";
};
};
};
};
};
&switch_port2 {
label = "lan2";
phy-mode = "rgmii-id";
phy-handle = <&switch0phy10>;
status = "okay";
};
&switch_port3 {
label = "lan3";
phy-mode = "rgmii-id";
phy-handle = <&switch0phy1>;
status = "okay";
};