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arm64: dts: ti: Add bootph property to nodes at source for am62a

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Add bootph property directly into the original definitions of relevant
nodes (e.g., power domains, USB controllers, and other peripherals)
within their respective DTSI files (ex. main, mcu, and wakeup) for
am62a.

By defining bootph in the nodes source definitions instead of appending
it later in final DTS files, this change ensures that the property is
inherently present wherever the nodes are reused across derived device
trees.

Signed-off-by: Paresh Bhagat <p-bhagat@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Link: https://lore.kernel.org/r/20250708085839.1498505-2-p-bhagat@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
This commit is contained in:
Paresh Bhagat 2025-07-08 14:28:36 +05:30 committed by Vignesh Raghavendra
parent 3b08f8a34a
commit 1704b04622
2 changed files with 15 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

13
arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
View File

@ -51,6 +51,7 @@ phy_gmii_sel: phy@4044 {
compatible = "ti,am654-phy-gmii-sel";
reg = <0x4044 0x8>;
#phy-cells = <1>;
bootph-all;
};
epwm_tbclk: clock-controller@4130 {
@ -96,6 +97,7 @@ secure_proxy_main: mailbox@4d000000 {
#mbox-cells = <1>;
interrupt-names = "rx_012";
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
bootph-all;
};
inta_main_dmss: interrupt-controller@48000000 {
@ -131,6 +133,7 @@ main_bcdma: dma-controller@485c0100 {
ti,sci-rm-range-bchan = <0x20>; /* BLOCK_COPY_CHAN */
ti,sci-rm-range-rchan = <0x21>; /* SPLIT_TR_RX_CHAN */
ti,sci-rm-range-tchan = <0x22>; /* SPLIT_TR_TX_CHAN */
bootph-all;
};
main_pktdma: dma-controller@485c0000 {
@ -147,6 +150,8 @@ main_pktdma: dma-controller@485c0000 {
"ring", "tchan", "rchan", "rflow";
msi-parent = <&inta_main_dmss>;
#dma-cells = <2>;
bootph-all;
ti,sci = <&dmsc>;
ti,sci-dev-id = <30>;
ti,sci-rm-range-tchan = <0x23>, /* UNMAPPED_TX_CHAN */
@ -220,16 +225,19 @@ dmsc: system-controller@44043000 {
k3_pds: power-controller {
compatible = "ti,sci-pm-domain";
#power-domain-cells = <2>;
bootph-all;
};
k3_clks: clock-controller {
compatible = "ti,k2g-sci-clk";
#clock-cells = <2>;
bootph-all;
};
k3_reset: reset-controller {
compatible = "ti,sci-reset";
#reset-cells = <2>;
bootph-all;
};
};
@ -254,6 +262,7 @@ secure_proxy_sa3: mailbox@43600000 {
* firmware on non-MPU processors
*/
status = "disabled";
bootph-all;
};
main_pmx0: pinctrl@f4000 {
@ -282,6 +291,7 @@ main_timer0: timer@2400000 {
assigned-clock-parents = <&k3_clks 36 3>;
power-domains = <&k3_pds 36 TI_SCI_PD_EXCLUSIVE>;
ti,timer-pwm;
bootph-all;
};
main_timer1: timer@2410000 {
@ -651,6 +661,7 @@ usb0: usb@31000000 {
interrupt-names = "host", "peripheral";
maximum-speed = "high-speed";
dr_mode = "otg";
bootph-all;
snps,usb2-gadget-lpm-disable;
snps,usb2-lpm-disable;
};
@ -745,6 +756,7 @@ cpsw_port1: port@1 {
phys = <&phy_gmii_sel 1>;
mac-address = [00 00 00 00 00 00];
ti,syscon-efuse = <&cpsw_mac_syscon 0x0>;
bootph-all;
};
cpsw_port2: port@2 {
@ -764,6 +776,7 @@ cpsw3g_mdio: mdio@f00 {
clocks = <&k3_clks 13 0>;
clock-names = "fck";
bus_freq = <1000000>;
bootph-all;
};
cpts@3d000 {

2
arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi
View File

@ -17,6 +17,7 @@ wkup_conf: bus@43000000 {
chipid: chipid@14 {
compatible = "ti,am654-chipid";
reg = <0x14 0x4>;
bootph-all;
};
opp_efuse_table: syscon@18 {
@ -67,6 +68,7 @@ wkup_uart0: serial@0 {
reg = <0 0x100>;
interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
bootph-pre-ram;
};
};