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net/mlx5: IFC add balance ID and LAG per MP group bits
Add interface definitions for load balance ID and LAG per multiplane group functionality. This patch introduces the hardware capability bits needed to support balance ID in multiplane LAG configurations. The new fields include: - load_balance_id: 4-bit field for balance identifier. - lag_per_mp_group: capability bit for LAG per multiplane group support. These interface additions are prerequisites for implementing balance ID support in the MLX5 driver. Signed-off-by: Mark Bloch <mbloch@nvidia.com> Reviewed-by: Shay Drori <shayd@nvidia.com> Signed-off-by: Tariq Toukan <tariqt@nvidia.com> Link: https://patch.msgid.link/1758521191-814350-3-git-send-email-tariqt@nvidia.com Signed-off-by: Leon Romanovsky <leon@kernel.org>
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@ -2235,12 +2235,16 @@ struct mlx5_ifc_cmd_hca_cap_2_bits {
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u8 reserved_at_440[0x8];
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u8 max_num_eqs_24b[0x18];
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u8 reserved_at_460[0x160];
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u8 reserved_at_460[0x144];
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u8 load_balance_id[0x4];
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u8 reserved_at_5a8[0x18];
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u8 query_adjacent_functions_id[0x1];
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u8 ingress_egress_esw_vport_connect[0x1];
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u8 function_id_type_vhca_id[0x1];
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u8 reserved_at_5c3[0xd];
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u8 reserved_at_5c3[0x1];
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u8 lag_per_mp_group[0x1];
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u8 reserved_at_5c5[0xb];
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u8 delegate_vhca_management_profiles[0x10];
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u8 delegated_vhca_max[0x10];
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