mirror of
https://github.com/torvalds/linux.git
synced 2026-07-28 10:09:10 +02:00
aspeed: First batch of ARM devicetree changes for v7.2
New platforms: - Rainiera6 (Meta) - SanMiguel (Meta) Updated platforms: - Anacapa: SGPIO line names and interrupt configuration - Clemente: Remove TMP421 nodes - Kommando: Enable networking via MAC2/MDIO2 - SanMiguel: Line names and interrupt configuration AST2600 SoC updates: - Describe PWM/Tach - Describe I3C controllers - Reorganise I2C nodes Other notes:91b9aed738("ARM: dts: aspeed-g6: Add nodes for i3c controllers") currently causes a new warning: ... /ahb/apb/bus@1e7a0000/syscon@0: failed to match any schema with compatible: ['aspeed,ast2600-i3c-global', 'syscon'] The patch necessary to address it has an R-b tag from Kryzsztof[2] but as best I can tell is yet to be applied to the MFD tree. I've left the change in for now as the warning will resolve once the binding patch is applied. Lastly, as part of improving support for the Kommando card Anirudh has also addressed[1] the persistent pain we've had with the phy-mode property for the AST2600 MACs. Thanks to Andrew Lunn for being on the case for a while now, and for those who tested Anirudh's patch. [1]: https://lore.kernel.org/all/20260525-asus-kommando-v3-0-e6a0ca1b4a3e@gmail.com/ [2]: https://lore.kernel.org/all/20260425-poised-accomplished-hyena-d2c1a0@quoll/ -----BEGIN PGP SIGNATURE----- iJIEABYKADoWIQSoUT1x3bOSX/nAa8ajM9GZTrjhpgUCah+R1RwcYW5kcmV3QGNv ZGVjb25zdHJ1Y3QuY29tLmF1AAoJEKMz0ZlOuOGmREgA/jRNiutECMQIXr4y3K33 +c4oHhcUvdGb+xgGCsI6aQ/zAQCrmJet9FHLCcNOnklh1Ob+jpl4U+nMow1lzUn/ 2COBCA== =eDXl -----END PGP SIGNATURE----- Merge tag 'aspeed-7.2-devicetree-0' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/bmc/linux into soc/dt aspeed: First batch of ARM devicetree changes for v7.2 New platforms: - Rainiera6 (Meta) - SanMiguel (Meta) Updated platforms: - Anacapa: SGPIO line names and interrupt configuration - Clemente: Remove TMP421 nodes - Kommando: Enable networking via MAC2/MDIO2 - SanMiguel: Line names and interrupt configuration AST2600 SoC updates: - Describe PWM/Tach - Describe I3C controllers - Reorganise I2C nodes Other notes:91b9aed738("ARM: dts: aspeed-g6: Add nodes for i3c controllers") currently causes a new warning: ... /ahb/apb/bus@1e7a0000/syscon@0: failed to match any schema with compatible: ['aspeed,ast2600-i3c-global', 'syscon'] The patch necessary to address it has an R-b tag from Kryzsztof[2] but as best I can tell is yet to be applied to the MFD tree. I've left the change in for now as the warning will resolve once the binding patch is applied. Lastly, as part of improving support for the Kommando card Anirudh has also addressed[1] the persistent pain we've had with the phy-mode property for the AST2600 MACs. Thanks to Andrew Lunn for being on the case for a while now, and for those who tested Anirudh's patch. [1]: https://lore.kernel.org/all/20260525-asus-kommando-v3-0-e6a0ca1b4a3e@gmail.com/ [2]: https://lore.kernel.org/all/20260425-poised-accomplished-hyena-d2c1a0@quoll/ * tag 'aspeed-7.2-devicetree-0' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/bmc/linux: ARM: dts: aspeed: sanmiguel: Fix the CPU_CHIPTHROT linename ARM: dts: aspeed: sanmiguel: Add IOEXP interrupt pin settings ARM: dts: aspeed: clemente: Remove IOB NIC TMP421 nodes ARM: dts: aspeed: Enable networking for Asus Kommando IPMI Card ARM: dts: aspeed: rainiera6: Add Meta Rainiera6 BMC dt-bindings: arm: aspeed: Add Meta Rainiera6 board ARM: dts: aspeed: anacapa: Correct SGPIO names for monitoring ARM: dts: aspeed: Add Meta SanMiguel BMC dt-bindings: arm: aspeed: add Meta SanMiguel BMC ARM: dts: aspeed: g6: Add PWM/Tach controller node ARM: dts: aspeed: yosemite5: Add MP5998 power monitor ARM: dts: aspeed: anacapa: Add interrupt properties for PDB PCA9555 ARM: dts: aspeed: msx4: enable BMC networking via MAC0 ARM: dts: aspeed: anacapa: Add JTAG CPLD TRST pin to SGPIO map ARM: dts: aspeed-g6: Add nodes for i3c controllers ARM: dts: aspeed-g6: move i2c controllers directly into apb node Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This commit is contained in:
Krzysztof Kozlowski
commit
08fec5b1d3
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@ -95,6 +95,8 @@ properties:
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- facebook,greatlakes-bmc
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- facebook,harma-bmc
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- facebook,minerva-cmc
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- facebook,rainiera6-bmc
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- facebook,sanmiguel-bmc
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- facebook,santabarbara-bmc
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- facebook,yosemite4-bmc
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- facebook,yosemite5-bmc
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|
|
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@ -34,6 +34,8 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
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aspeed-bmc-facebook-harma.dtb \
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aspeed-bmc-facebook-minerva.dtb \
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aspeed-bmc-facebook-minipack.dtb \
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aspeed-bmc-facebook-rainiera6.dtb \
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aspeed-bmc-facebook-sanmiguel.dtb \
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aspeed-bmc-facebook-santabarbara.dtb \
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aspeed-bmc-facebook-tiogapass.dtb \
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aspeed-bmc-facebook-wedge40.dtb \
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@ -107,6 +107,24 @@ &gpio1 {
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/*18E0 32*/ "","","","","","","","";
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};
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&mac2 {
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status = "okay";
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phy-mode = "rgmii-id";
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phy-handle = <ðphy2>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_rgmii3_default>;
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};
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&mdio2 {
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status = "okay";
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ethphy2: ethernet-phy@0 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <0>;
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};
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};
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&vhub {
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status = "okay";
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};
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@ -481,6 +481,9 @@ gpio@22 {
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-parent = <&sgpiom0>;
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interrupts = <174 IRQ_TYPE_LEVEL_LOW>;
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gpio-line-names =
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"RPDB_FAN_FULL_SPEED_R_N", "RPDB_I2C_TEMP75_U8_ALERT_R_N",
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"RPDB_I2C_TMP432_U29_ALERT_R_N", "RPDB_GLOBAL_WP",
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@ -500,6 +503,9 @@ gpio@24 {
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-parent = <&sgpiom0>;
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interrupts = <174 IRQ_TYPE_LEVEL_LOW>;
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gpio-line-names =
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"RPDB_EAM2_PRSNT_MOS_N_R", "RPDB_EAM3_PRSNT_MOS_N_R",
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"RPDB_PWRGD_P50V_HSC4_SYS_R",
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@ -529,6 +535,9 @@ gpio@22 {
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-parent = <&sgpiom0>;
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interrupts = <174 IRQ_TYPE_LEVEL_LOW>;
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gpio-line-names =
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"LPDB_FAN_FULL_SPEED_R_N","LPDB_I2C_TEMP75_U8_ALERT_R_N",
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"LPDB_I2C_TMP432_U29_ALERT_R_N","LPDB_GLOBAL_WP",
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@ -546,6 +555,9 @@ gpio@24 {
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-parent = <&sgpiom0>;
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interrupts = <174 IRQ_TYPE_LEVEL_LOW>;
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gpio-line-names =
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"LPDB_P50V_FAN1_R2_PG","LPDB_P50V_FAN2_R2_PG",
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"LPDB_P50V_FAN3_R2_PG","LPDB_P50V_FAN4_R2_PG",
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@ -882,7 +894,7 @@ &sgpiom0 {
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/* C0-C7 line 32-47 */
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"RSVD_RMC_GPIO3", "", "", "",
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"", "", "", "",
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"LEAK_DETECT_RMC_N", "", "", "",
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"LEAK_DETECT_RMC_N", "JTAG_CPLD_TRST_R_N", "", "",
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"", "", "", "",
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/* D0-D7 line 48-63 */
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@ -908,11 +920,11 @@ &sgpiom0 {
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"", "", "", "",
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/* G0-G7 line 96-111 */
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"PWRGD_PVDDCR_SOC_P0", "",
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"PWRGD_PVDDIO_P0", "",
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"PWRGD_PVDDIO_MEM_S3_P0", "",
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"PWRGD_CHMP_CPU0_FPGA", "",
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"PWRGD_CHIL_CPU0_FPGA", "",
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"L_PRSNT_EDSFF0_N", "",
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"L_PRSNT_EDSFF1_N", "",
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"R_PRSNT_EDSFF2_N", "",
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"R_PRSNT_EDSFF3_N", "",
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"HPM_EDSFF_PG", "",
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"PWRGD_CHEH_CPU0_FPGA", "",
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"PWRGD_CHAD_CPU0_FPGA", "FM_BMC_READY_PLD",
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"", "",
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@ -934,7 +946,7 @@ &sgpiom0 {
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"EAM3_BRD_PRSNT_R_L", "",
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"EAM0_CPU_MOD_PWR_GD_R", "",
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"EAM1_CPU_MOD_PWR_GD_R", "",
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"EAM2_CPU_MOD_PWR_GD_R", "",
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"PRSNT_EDSFF_BOOT_N", "",
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"EAM3_CPU_MOD_PWR_GD_R", "",
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/* J0-J7 line 144-159 */
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@ -957,8 +969,8 @@ &sgpiom0 {
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"PDB_ALERT_R_N", "",
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/* L0-L7 line 176-191 */
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"CPU0_SP7R1", "", "CPU0_SP7R2", "",
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"CPU0_SP7R3", "", "CPU0_SP7R4", "",
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"L_EDSFF0_PG", "", "L_EDSFF1_PG", "",
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"R_EDSFF2_PG", "", "R_EDSFF3_PG", "",
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"CPU0_CORETYPE0", "", "CPU0_CORETYPE1", "",
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"CPU0_CORETYPE2", "", "FM_BIOS_POST_CMPLT_R_N", "",
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@ -984,8 +996,8 @@ &sgpiom0 {
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"HPM_PWR_FAIL", "Port80_b0",
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"FM_DIMM_IP_FAIL", "Port80_b1",
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"FM_DIMM_AH_FAIL", "Port80_b2",
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"HPM_AMC_THERMTRIP_R_L", "Port80_b3",
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"FM_CPU0_THERMTRIP_N", "Port80_b4",
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"AMC_THERMTRIP_ASSERT", "Port80_b3",
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"CPU_THERMTRIP_ASSERT", "Port80_b4",
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"PVDDCR_SOC_P0_OCP_L", "Port80_b5",
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"CPLD_SGPIO_RDY", "Port80_b6",
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"", "Port80_b7",
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@ -443,11 +443,6 @@ i2c0mux2ch0: i2c@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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// IOB0 NIC0 TEMP
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temperature-sensor@1f {
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compatible = "ti,tmp421";
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reg = <0x1f>;
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};
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};
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i2c0mux2ch1: i2c@1 {
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@ -466,11 +461,6 @@ i2c0mux2ch3: i2c@3 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <3>;
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// IOB0 NIC1 TEMP
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temperature-sensor@1f {
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compatible = "ti,tmp421";
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reg = <0x1f>;
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};
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};
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};
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@ -637,11 +627,6 @@ i2c0mux5ch0: i2c@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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// IOB1 NIC0 TEMP
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temperature-sensor@1f {
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compatible = "ti,tmp421";
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reg = <0x1f>;
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};
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};
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i2c0mux5ch1: i2c@1 {
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@ -666,11 +651,6 @@ i2c0mux5ch3: i2c@3 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <3>;
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// IOB1 NIC1 TEMP
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temperature-sensor@1f {
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compatible = "ti,tmp421";
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reg = <0x1f>;
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};
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};
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};
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};
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1012
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-rainiera6.dts
Normal file
1012
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-rainiera6.dts
Normal file
File diff suppressed because it is too large
Load Diff
672
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-sanmiguel.dts
Normal file
672
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-sanmiguel.dts
Normal file
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@ -0,0 +1,672 @@
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// SPDX-License-Identifier: GPL-2.0+
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// Copyright (c) 2025 Facebook Inc.
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/dts-v1/;
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#include "aspeed-g6.dtsi"
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#include <dt-bindings/gpio/aspeed-gpio.h>
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#include <dt-bindings/i2c/i2c.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/leds/common.h>
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#include <dt-bindings/leds/leds-pca955x.h>
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#include <dt-bindings/usb/pd.h>
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/ {
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model = "Facebook SanMiguel BMC";
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compatible = "facebook,sanmiguel-bmc", "aspeed,ast2600";
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aliases {
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serial0 = &uart1;
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serial1 = &uart2;
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serial2 = &uart3;
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serial3 = &uart4;
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serial4 = &uart5;
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i2c16 = &imux16;
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i2c17 = &imux17;
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i2c18 = &imux18;
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i2c19 = &imux19;
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};
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chosen {
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stdout-path = "serial4:57600n8";
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};
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iio-hwmon {
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compatible = "iio-hwmon";
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io-channels = <&adc0 0>, <&adc0 1>, <&adc0 2>, <&adc0 3>,
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<&adc0 4>, <&adc0 5>, <&adc0 6>;
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};
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leds-fio {
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compatible = "gpio-leds";
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led-0 {
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label = "power_blue";
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gpios = <&fio_ioexp 4 GPIO_ACTIVE_HIGH>;
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};
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led-1 {
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label = "power_amber";
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gpios = <&fio_ioexp 5 GPIO_ACTIVE_LOW>;
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};
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led-2 {
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label = "id_blue";
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gpios = <&fio_ioexp 6 GPIO_ACTIVE_HIGH>;
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};
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led-3 {
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label = "id_amber";
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gpios = <&fio_ioexp 7 GPIO_ACTIVE_LOW>;
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};
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};
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leds-smm {
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compatible = "gpio-leds";
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led-0 {
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label = "bmc_heartbeat_amber";
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gpios = <&gpio0 ASPEED_GPIO(P, 7) GPIO_ACTIVE_LOW>;
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linux,default-trigger = "heartbeat";
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};
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};
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memory@80000000 {
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device_type = "memory";
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reg = <0x80000000 0x80000000>;
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};
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spi2_gpio: spi {
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compatible = "spi-gpio";
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#address-cells = <1>;
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#size-cells = <0>;
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sck-gpios = <&gpio0 ASPEED_GPIO(X, 3) GPIO_ACTIVE_HIGH>;
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mosi-gpios = <&gpio0 ASPEED_GPIO(X, 4) GPIO_ACTIVE_HIGH>;
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miso-gpios = <&gpio0 ASPEED_GPIO(X, 5) GPIO_ACTIVE_HIGH>;
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cs-gpios = <&gpio0 ASPEED_GPIO(X, 2) GPIO_ACTIVE_LOW>;
|
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num-chipselects = <1>;
|
||||
|
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tpm@0 {
|
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compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
|
||||
spi-max-frequency = <33000000>;
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
standby_power_regulator: standby-power-regulator {
|
||||
compatible = "regulator-fixed";
|
||||
gpio = <&gpio0 ASPEED_GPIO(M, 3) GPIO_ACTIVE_HIGH>;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-name = "standby_power";
|
||||
enable-active-high;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&adc0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_adc0_default &pinctrl_adc1_default
|
||||
&pinctrl_adc2_default &pinctrl_adc3_default
|
||||
&pinctrl_adc4_default &pinctrl_adc5_default
|
||||
&pinctrl_adc6_default>;
|
||||
aspeed,int-vref-microvolt = <2500000>;
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&fmc {
|
||||
status = "okay";
|
||||
|
||||
flash@0 {
|
||||
label = "bmc";
|
||||
spi-max-frequency = <50000000>;
|
||||
m25p,fast-read;
|
||||
|
||||
status = "okay";
|
||||
#include "openbmc-flash-layout-128.dtsi"
|
||||
};
|
||||
|
||||
flash@1 {
|
||||
label = "alt-bmc";
|
||||
spi-max-frequency = <50000000>;
|
||||
m25p,fast-read;
|
||||
|
||||
status = "okay";
|
||||
#include "openbmc-flash-layout-128-alt.dtsi"
|
||||
};
|
||||
};
|
||||
|
||||
&gpio0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpiom4_unbiased_default
|
||||
&pinctrl_gpiom5_unbiased_default
|
||||
&pinctrl_gpiov4_unbiased_default
|
||||
&pinctrl_gpiov7_unbiased_default>;
|
||||
|
||||
gpio-line-names =
|
||||
/*A0-A7*/ "", "", "", "", "", "", "", "",
|
||||
/*B0-B7*/ "", "", "", "", "", "", "", "",
|
||||
/*C0-C7*/ "", "", "", "", "", "", "", "",
|
||||
/*D0-D7*/ "", "", "", "", "", "FPGA_PEX_RST_L", "", "",
|
||||
/*E0-E7*/ "RTL8221_PHY_RST_L-O", "RTL8211_PHY_INT_L-I", "", "",
|
||||
"", "", "", "MUX_SGPIO_SEL-O",
|
||||
/*F0-F7*/ "", "", "", "", "", "", "", "",
|
||||
/*G0-G7*/ "", "", "", "", "", "", "", "",
|
||||
/*H0-H7*/ "", "", "", "", "", "", "", "",
|
||||
/*I0-I7*/ "", "", "", "",
|
||||
"", "QSPI2_RST_L-O",
|
||||
"GLOBAL_WP_BMC-I", "BMC_DDR4_TEN-O",
|
||||
/*J0-J7*/ "", "", "", "", "", "", "", "",
|
||||
/*K0-K7*/ "", "", "", "", "", "", "", "",
|
||||
/*L0-L7*/ "", "", "", "", "", "", "", "",
|
||||
/*M0-M7*/ "USB_HUB_RST_N-O", "BMC_FRU_WP-O",
|
||||
"", "HMC_STBY_POWER_EN-O",
|
||||
"STBY_POWER_PG-I", "PCIE_EP_RST_L-O", "", "",
|
||||
/*N0-N7*/ "", "", "", "", "", "", "", "",
|
||||
/*O0-O7*/ "", "", "", "", "", "", "", "",
|
||||
/*P0-P7*/ "", "", "", "", "", "", "", "",
|
||||
/*Q0-Q7*/ "", "", "", "", "", "", "", "",
|
||||
/*R0-R7*/ "", "SP0_AP_INTR_N-I", "", "", "", "", "", "",
|
||||
/*S0-S7*/ "", "", "", "", "", "", "", "",
|
||||
/*T0-T7*/ "", "", "", "", "", "", "", "",
|
||||
/*U0-U7*/ "", "", "", "", "", "", "", "",
|
||||
/*V0-V7*/ "", "", "", "", "PCB_TEMP_ALERT-I", "", "", "",
|
||||
/*W0-W7*/ "", "", "", "", "", "", "", "CPU_RST_L-I",
|
||||
/*X0-X7*/ "", "", "", "", "", "", "", "",
|
||||
/*Y0-Y7*/ "", "", "", "EMMC_RST-O", "", "", "", "",
|
||||
/*Z0-Z7*/ "HMC_EROT_SPI_INT_L-I", "", "", "", "", "", "", "";
|
||||
};
|
||||
|
||||
&gpio1 {
|
||||
/* 36 1.8V GPIOs */
|
||||
gpio-line-names =
|
||||
/*A0-A7*/ "", "", "", "", "", "", "", "",
|
||||
/*B0-B7*/ "", "", "", "",
|
||||
"AP_EROT_REQ-O", "EROT_AP_GNT-I",
|
||||
"IO_EXPANDER_INT_L-I", "",
|
||||
/*C0-C7*/ "", "", "", "", "", "", "", "",
|
||||
/*D0-D7*/ "", "", "", "", "", "", "", "I2C_SSIF_ALERT_L-I",
|
||||
/*E0-E7*/ "", "", "", "", "", "", "", "";
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
status = "okay";
|
||||
|
||||
ssif-bmc@10 {
|
||||
compatible = "ssif-bmc";
|
||||
reg = <0x10>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
status = "okay";
|
||||
|
||||
hpm0_ioexp_20: gpio@20 {
|
||||
compatible = "nxp,pca9555";
|
||||
reg = <0x20>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <ASPEED_GPIO(B, 6) IRQ_TYPE_LEVEL_LOW>;
|
||||
vcc-supply = <&standby_power_regulator>;
|
||||
|
||||
gpio-line-names =
|
||||
"B0_M0_SHDN_FORCE_L-O",
|
||||
"B0_M0_STBY_POWER_PG-I",
|
||||
"B0_M0_THERM_OVERT_L-I",
|
||||
"B0_M0_THERM_WARN_L-I",
|
||||
"B0_M0_GLOBAL_WP-O",
|
||||
"B0_M0_USB_HUB0_RST_L-O",
|
||||
"B0_M0_PRE_SYS_RST_L-O",
|
||||
"B0_M0_LEAK_DETECT_ALERT_L-I",
|
||||
"B0_M0_RUN_POWER_EN-O",
|
||||
"B0_M0_RUN_POWER_PG-I",
|
||||
"B0_M0_CPU_CHIPTHROT_L-I",
|
||||
"B0_M0_SHDN_REQ_L-O",
|
||||
"B0_M0_CPU_SHDN_OK_L-I",
|
||||
"B0_M0_CPLD_READY-I",
|
||||
"B0_M0_PWR_BRAKE_L-O",
|
||||
"B0_M0_PWR_BRAKE_STATUS_L-I";
|
||||
};
|
||||
|
||||
hpm0_ioexp_21: gpio@21 {
|
||||
compatible = "nxp,pca9555";
|
||||
reg = <0x21>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <ASPEED_GPIO(B, 6) IRQ_TYPE_LEVEL_LOW>;
|
||||
vcc-supply = <&standby_power_regulator>;
|
||||
|
||||
gpio-line-names =
|
||||
"B0_M0_I2C_BUS_MUX_RESET_L-O",
|
||||
"B0_M0_HPM_MCU_OK-I",
|
||||
"B0_M0_CPU_L0_RST_IND_L-O",
|
||||
"B0_M0_C0_SOCAMM_DAC_SEL0-O",
|
||||
"B0_M0_C1_SOCAMM_DAC_SEL1-O",
|
||||
"B0_M0_C0_SOCAMM_I2C_SEL_R-O",
|
||||
"B0_M0_C1_SOCAMM_I2C_SEL_R-O",
|
||||
"B0_M0_EEPROM_POWER_DISABLE-O",
|
||||
"B0_M0_L0L1_RST_L-I",
|
||||
"B0_M0_L2_RST_L-I",
|
||||
"B0_M0_BRD_ID_0-I",
|
||||
"B0_M0_BRD_ID_1-I",
|
||||
"B0_M0_BMC_LEAK_TEST_L-O",
|
||||
"B0_M0_MCU_BMC_ALERT_L-I",
|
||||
"B0_M0_CPU_BOOT_COMPLETE_3V3-I",
|
||||
"B0_M0_BMC_TO_GPU_MCU_I2C_EN-O";
|
||||
};
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c4 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c5 {
|
||||
status = "okay";
|
||||
|
||||
smm_ioexp_20: gpio@20 {
|
||||
compatible = "nxp,pca9555";
|
||||
reg = <0x20>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <ASPEED_GPIO(B, 6) IRQ_TYPE_LEVEL_LOW>;
|
||||
|
||||
gpio-line-names =
|
||||
"HMC_RST_R_L-O", "HMC_RECOVERY_R-O",
|
||||
"HMC_SPI_MUX_R_SEL-O", "GLOBAL_WP-O",
|
||||
"HMC_READY-I", "HMC_PRSNT_R-I",
|
||||
"BMC_SELF_PWR_CYCLE-O", "EEDO_LED2-O",
|
||||
"PWR_LED_L-O", "PWR_BTN_L-I",
|
||||
"UID_LED_L-O", "UID_BTN_L-I",
|
||||
"FAULT_LED_L-O", "USB2_HUB_RST_L-O",
|
||||
"USB2_BMC_HUB2_RST_L-O", "WARN_LED_L-O";
|
||||
};
|
||||
|
||||
smm_ioexp_21: gpio@21 {
|
||||
compatible = "nxp,pca9555";
|
||||
reg = <0x21>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <ASPEED_GPIO(B, 6) IRQ_TYPE_LEVEL_LOW>;
|
||||
|
||||
gpio-line-names =
|
||||
"BMC_HMC_MUX_SEL-O", "BMC_TPM_MUX_SEL-O",
|
||||
"BMC_USB2_MUX_SEL-O", "HMC_PGOOD_3V3-I",
|
||||
"", "HDR_SPI_PRSNT_L-I",
|
||||
"SW_NRESET_R_L-O", "MUX_I2C_ESPI_SEL-O",
|
||||
"I2C_BUS_MUX_RESET_L-O", "USB_MUX_EN-O",
|
||||
"PDB_TRAY_RST-O", "USB_PWR_EN-O",
|
||||
"RTC_CLR_L-O", "I2C_RTC_ALERT_L-I",
|
||||
"X86_TPM_RST_SEL_L-O", "BMC_MUX_PI3DP_SEL-O";
|
||||
};
|
||||
|
||||
smm_temp: temperature-sensor@48 {
|
||||
compatible = "national,lm75";
|
||||
reg = <0x48>;
|
||||
};
|
||||
|
||||
smm_fru: eeprom@50 {
|
||||
compatible = "atmel,24c128";
|
||||
reg = <0x50>;
|
||||
};
|
||||
|
||||
rtc@6f {
|
||||
compatible = "nuvoton,nct3018y";
|
||||
reg = <0x6f>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c6 {
|
||||
status = "okay";
|
||||
|
||||
hmc_ioexp: gpio@20 {
|
||||
compatible = "ti,tca6408";
|
||||
reg = <0x20>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <ASPEED_GPIO(B, 6) IRQ_TYPE_LEVEL_LOW>;
|
||||
|
||||
gpio-line-names =
|
||||
"", "", "HMC_EROT_FATAL_ERROR_L-I", "",
|
||||
"", "HMC_EROT_RECOVERY_L-O", "HMC_EROT_RESET_L-O", "";
|
||||
};
|
||||
|
||||
i2c-mux@70 {
|
||||
compatible = "nxp,pca9546";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x70>;
|
||||
i2c-mux-idle-disconnect;
|
||||
|
||||
imux16: i2c@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
imux17: i2c@1 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <1>;
|
||||
};
|
||||
|
||||
imux18: i2c@2 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <2>;
|
||||
};
|
||||
|
||||
imux19: i2c@3 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <3>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c7 {
|
||||
status = "okay";
|
||||
|
||||
hpm1_ioexp_20: gpio@20 {
|
||||
compatible = "nxp,pca9555";
|
||||
reg = <0x20>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <ASPEED_GPIO(B, 6) IRQ_TYPE_LEVEL_LOW>;
|
||||
vcc-supply = <&standby_power_regulator>;
|
||||
|
||||
gpio-line-names =
|
||||
"B1_M0_SHDN_FORCE_L-O",
|
||||
"B1_M0_STBY_POWER_PG-I",
|
||||
"B1_M0_THERM_OVERT_L-I",
|
||||
"B1_M0_THERM_WARN_L-I",
|
||||
"B1_M0_GLOBAL_WP-O",
|
||||
"B1_M0_USB_HUB0_RST_L-O",
|
||||
"B1_M0_PRE_SYS_RST_L-O",
|
||||
"B1_M0_LEAK_DETECT_ALERT_L-I",
|
||||
"B1_M0_RUN_POWER_EN-O",
|
||||
"B1_M0_RUN_POWER_PG-I",
|
||||
"B1_M0_CPU_CHIPTHROT_L-I",
|
||||
"B1_M0_SHDN_REQ_L-O",
|
||||
"B1_M0_CPU_SHDN_OK_L-I",
|
||||
"B1_M0_CPLD_READY-I",
|
||||
"B1_M0_PWR_BRAKE_L-O",
|
||||
"B1_M0_PWR_BRAKE_STATUS_L-I";
|
||||
};
|
||||
|
||||
hpm1_ioexp_21: gpio@21 {
|
||||
compatible = "nxp,pca9555";
|
||||
reg = <0x21>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <ASPEED_GPIO(B, 6) IRQ_TYPE_LEVEL_LOW>;
|
||||
vcc-supply = <&standby_power_regulator>;
|
||||
|
||||
gpio-line-names =
|
||||
"B1_M0_I2C_BUS_MUX_RESET_L-O",
|
||||
"B1_M0_HPM_MCU_OK-I",
|
||||
"B1_M0_CPU_L0_RST_IND_L-O",
|
||||
"B1_M0_C0_SOCAMM_DAC_SEL0-O",
|
||||
"B1_M0_C1_SOCAMM_DAC_SEL1-O",
|
||||
"B1_M0_C0_SOCAMM_I2C_SEL_R-O",
|
||||
"B1_M0_C1_SOCAMM_I2C_SEL_R-O",
|
||||
"B1_M0_EEPROM_POWER_DISABLE-O",
|
||||
"B1_M0_L0L1_RST_L-I",
|
||||
"B1_M0_L2_RST_L-I",
|
||||
"B1_M0_BRD_ID_0-I",
|
||||
"B1_M0_BRD_ID_1-I",
|
||||
"B1_M0_BMC_LEAK_TEST_L-O",
|
||||
"B1_M0_MCU_BMC_ALERT_L-I",
|
||||
"B1_M0_CPU_BOOT_COMPLETE_3V3-I",
|
||||
"B1_M0_BMC_TO_GPU_MCU_I2C_EN-O";
|
||||
};
|
||||
};
|
||||
|
||||
&i2c8 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c9 {
|
||||
status = "okay";
|
||||
|
||||
pdb_mps_hsc1: power-monitor@10 {
|
||||
compatible = "mps,mp5926";
|
||||
reg = <0x10>;
|
||||
};
|
||||
|
||||
pdb_ti_hsc1: power-monitor@11 {
|
||||
compatible = "ti,lm5066i";
|
||||
reg = <0x11>;
|
||||
shunt-resistor-micro-ohms = <763>;
|
||||
};
|
||||
|
||||
pdb_mps_hsc2: power-monitor@12 {
|
||||
compatible = "mps,mp5926";
|
||||
reg = <0x12>;
|
||||
};
|
||||
|
||||
pdb_ti_hsc2: power-monitor@13 {
|
||||
compatible = "ti,lm5066i";
|
||||
reg = <0x13>;
|
||||
shunt-resistor-micro-ohms = <294>;
|
||||
};
|
||||
|
||||
pdb_mps_hsc3: power-monitor@14 {
|
||||
compatible = "mps,mp5926";
|
||||
reg = <0x14>;
|
||||
};
|
||||
|
||||
pdb_ti_hsc3: power-monitor@15 {
|
||||
compatible = "ti,lm5066i";
|
||||
reg = <0x15>;
|
||||
shunt-resistor-micro-ohms = <294>;
|
||||
};
|
||||
|
||||
pdb_mps_hsc4: power-monitor@16 {
|
||||
compatible = "mps,mp5926";
|
||||
reg = <0x16>;
|
||||
};
|
||||
|
||||
pdb_ti_hsc4: power-monitor@17 {
|
||||
compatible = "ti,lm5066i";
|
||||
reg = <0x17>;
|
||||
shunt-resistor-micro-ohms = <381>;
|
||||
};
|
||||
|
||||
pdb_ioexp_20: gpio@20 {
|
||||
compatible = "nxp,pca9555";
|
||||
reg = <0x20>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <ASPEED_GPIO(B, 6) IRQ_TYPE_LEVEL_LOW>;
|
||||
|
||||
gpio-line-names =
|
||||
"PDB_STRAP-I", "STBY_POWER_EN-O", "STBY_PWR_OK-I", "",
|
||||
"", "MAIN_PWR_EN-O", "MAIN_PWR_OK-I", "GLOBAL_WP-O",
|
||||
"PDB_PWR_BRK_L-I", "FAN_PRSNT-I", "", "",
|
||||
"HSC4_S5_OR_S0_N-O", "", "", "";
|
||||
};
|
||||
|
||||
pdb_temp: temperature-sensor@4e {
|
||||
compatible = "national,lm75";
|
||||
reg = <0x4e>;
|
||||
};
|
||||
|
||||
pdb_fru: eeprom@50 {
|
||||
compatible = "atmel,24c128";
|
||||
reg = <0x50>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c10 {
|
||||
status = "okay";
|
||||
|
||||
scm_temp: temperature-sensor@48 {
|
||||
compatible = "national,lm75";
|
||||
reg = <0x48>;
|
||||
};
|
||||
|
||||
scm_fru: eeprom@50 {
|
||||
compatible = "atmel,24c128";
|
||||
reg = <0x50>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c11 {
|
||||
status = "okay";
|
||||
|
||||
sw_config: eeprom@50 {
|
||||
compatible = "atmel,24c64";
|
||||
reg = <0x50>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c12 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c13 {
|
||||
status = "okay";
|
||||
mctp-controller;
|
||||
multi-master;
|
||||
|
||||
mctp@10 {
|
||||
compatible = "mctp-i2c-controller";
|
||||
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
|
||||
};
|
||||
|
||||
smm_ext_ioexp: gpio@38 {
|
||||
compatible = "nxp,pca9554";
|
||||
reg = <0x38>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <ASPEED_GPIO(B, 6) IRQ_TYPE_LEVEL_LOW>;
|
||||
|
||||
gpio-line-names =
|
||||
"SSD0_PRSNT_L-I", "E1S_PWR_EN-O",
|
||||
"SSD0_PWRDIS-O", "I2C_PDB_ALERT_L-I",
|
||||
"BMC_SSD0_RST_L-O", "GLOBAL_WP_E1S-O",
|
||||
"12V_SSD0_PGD-I", "SSD0_LED-O";
|
||||
};
|
||||
|
||||
smm_ext_fru: eeprom@55 {
|
||||
compatible = "atmel,24c128";
|
||||
reg = <0x55>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c14 {
|
||||
status = "okay";
|
||||
|
||||
fio_ioexp: gpio@20 {
|
||||
compatible = "nxp,pca9555";
|
||||
reg = <0x20>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <ASPEED_GPIO(B, 6) IRQ_TYPE_LEVEL_LOW>;
|
||||
|
||||
gpio-line-names =
|
||||
"", "", "", "",
|
||||
"PWR_LED_BLUE", "PWR_LED_AMBER_R_N",
|
||||
"BEEP_ID_LED_BLUE", "BEEP_ID_LED_AMBER_R_N",
|
||||
"", "", "", "",
|
||||
"FM_MAIN_PWREN_RMC_ISO_EN_N", "LEAK_DETECT_RMC_N",
|
||||
"PWRGD_RMC_N", "SMALL_LEAK_RMC_N";
|
||||
|
||||
pwrgd-rmc-hog {
|
||||
gpio-hog;
|
||||
gpios = <14 GPIO_ACTIVE_LOW>;
|
||||
output-low;
|
||||
};
|
||||
};
|
||||
|
||||
fio_fru: eeprom@50 {
|
||||
compatible = "atmel,24c64";
|
||||
reg = <0x50>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c15 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mdio0 {
|
||||
status = "okay";
|
||||
|
||||
ethphy0: ethernet-phy@0 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
&mac0 {
|
||||
pinctrl-names = "default";
|
||||
phy-mode = "rgmii-id";
|
||||
phy-handle = <ðphy0>;
|
||||
pinctrl-0 = <&pinctrl_rgmii1_default>;
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
pinctrl_gpiom4_unbiased_default: gpiom4 {
|
||||
pins = "B12";
|
||||
bias-disable;
|
||||
};
|
||||
pinctrl_gpiom5_unbiased_default: gpiom5 {
|
||||
pins = "C12";
|
||||
bias-disable;
|
||||
};
|
||||
pinctrl_gpiov4_unbiased_default: gpiov4 {
|
||||
pins = "AE15";
|
||||
bias-disable;
|
||||
};
|
||||
pinctrl_gpiov7_unbiased_default: gpiov7 {
|
||||
pins = "AF15";
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart3 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart5 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart_routing {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wdt1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_wdtrst1_default>;
|
||||
aspeed,reset-type = "soc";
|
||||
aspeed,external-signal;
|
||||
aspeed,ext-push-pull;
|
||||
aspeed,ext-active-high;
|
||||
aspeed,ext-pulse-duration = <256>;
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -422,6 +422,11 @@ power-sensor@45 {
|
|||
shunt-resistor = <1000>;
|
||||
};
|
||||
|
||||
power-monitor@46 {
|
||||
compatible = "mps,mp5998";
|
||||
reg = <0x46>;
|
||||
};
|
||||
|
||||
power-monitor@47 {
|
||||
compatible = "ti,tps25990";
|
||||
reg = <0x47>;
|
||||
|
|
|
|||
|
|
@ -208,6 +208,21 @@ &lpc_reset {
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
&mac0 {
|
||||
phy-mode = "rgmii-id";
|
||||
phy-handle = <ðphy3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mdio3 {
|
||||
status = "okay";
|
||||
|
||||
ethphy3: ethernet-phy@2 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
reg = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
&rtc {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -102,6 +102,15 @@ ahbc: bus@1e600000 {
|
|||
reg = <0x1e600000 0x100>;
|
||||
};
|
||||
|
||||
pwm_tach: pwm-tach-controller@1e610000 {
|
||||
compatible = "aspeed,ast2600-pwm-tach";
|
||||
reg = <0x1e610000 0x100>;
|
||||
clocks = <&syscon ASPEED_CLK_AHB>;
|
||||
resets = <&syscon ASPEED_RESET_PWM>;
|
||||
#pwm-cells = <3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
fmc: spi@1e620000 {
|
||||
reg = <0x1e620000 0xc4>, <0x20000000 0x10000000>;
|
||||
#address-cells = <1>;
|
||||
|
|
@ -835,11 +844,326 @@ uart9: serial@1e790300 {
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c: bus@1e78a000 {
|
||||
bus@1e78a000 {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0x1e78a000 0x1000>;
|
||||
|
||||
i2c0: i2c@80 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x80 0x80>;
|
||||
compatible = "aspeed,ast2600-i2c-bus";
|
||||
clocks = <&syscon ASPEED_CLK_APB2>;
|
||||
resets = <&syscon ASPEED_RESET_I2C>;
|
||||
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
|
||||
bus-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c1_default>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c1: i2c@100 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x100 0x80>;
|
||||
compatible = "aspeed,ast2600-i2c-bus";
|
||||
clocks = <&syscon ASPEED_CLK_APB2>;
|
||||
resets = <&syscon ASPEED_RESET_I2C>;
|
||||
interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
|
||||
bus-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c2_default>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c2: i2c@180 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x180 0x80>;
|
||||
compatible = "aspeed,ast2600-i2c-bus";
|
||||
clocks = <&syscon ASPEED_CLK_APB2>;
|
||||
resets = <&syscon ASPEED_RESET_I2C>;
|
||||
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
|
||||
bus-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c3_default>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c3: i2c@200 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x200 0x80>;
|
||||
compatible = "aspeed,ast2600-i2c-bus";
|
||||
clocks = <&syscon ASPEED_CLK_APB2>;
|
||||
resets = <&syscon ASPEED_RESET_I2C>;
|
||||
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
|
||||
bus-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c4_default>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c4: i2c@280 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x280 0x80>;
|
||||
compatible = "aspeed,ast2600-i2c-bus";
|
||||
clocks = <&syscon ASPEED_CLK_APB2>;
|
||||
resets = <&syscon ASPEED_RESET_I2C>;
|
||||
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
|
||||
bus-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c5_default>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c5: i2c@300 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x300 0x80>;
|
||||
compatible = "aspeed,ast2600-i2c-bus";
|
||||
clocks = <&syscon ASPEED_CLK_APB2>;
|
||||
resets = <&syscon ASPEED_RESET_I2C>;
|
||||
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
|
||||
bus-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c6_default>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c6: i2c@380 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x380 0x80>;
|
||||
compatible = "aspeed,ast2600-i2c-bus";
|
||||
clocks = <&syscon ASPEED_CLK_APB2>;
|
||||
resets = <&syscon ASPEED_RESET_I2C>;
|
||||
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
|
||||
bus-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c7_default>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c7: i2c@400 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x400 0x80>;
|
||||
compatible = "aspeed,ast2600-i2c-bus";
|
||||
clocks = <&syscon ASPEED_CLK_APB2>;
|
||||
resets = <&syscon ASPEED_RESET_I2C>;
|
||||
interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
|
||||
bus-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c8_default>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c8: i2c@480 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x480 0x80>;
|
||||
compatible = "aspeed,ast2600-i2c-bus";
|
||||
clocks = <&syscon ASPEED_CLK_APB2>;
|
||||
resets = <&syscon ASPEED_RESET_I2C>;
|
||||
interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
|
||||
bus-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c9_default>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c9: i2c@500 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x500 0x80>;
|
||||
compatible = "aspeed,ast2600-i2c-bus";
|
||||
clocks = <&syscon ASPEED_CLK_APB2>;
|
||||
resets = <&syscon ASPEED_RESET_I2C>;
|
||||
interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
|
||||
bus-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c10_default>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c10: i2c@580 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x580 0x80>;
|
||||
compatible = "aspeed,ast2600-i2c-bus";
|
||||
clocks = <&syscon ASPEED_CLK_APB2>;
|
||||
resets = <&syscon ASPEED_RESET_I2C>;
|
||||
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
|
||||
bus-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c11_default>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c11: i2c@600 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x600 0x80>;
|
||||
compatible = "aspeed,ast2600-i2c-bus";
|
||||
clocks = <&syscon ASPEED_CLK_APB2>;
|
||||
resets = <&syscon ASPEED_RESET_I2C>;
|
||||
interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
|
||||
bus-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c12_default>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c12: i2c@680 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x680 0x80>;
|
||||
compatible = "aspeed,ast2600-i2c-bus";
|
||||
clocks = <&syscon ASPEED_CLK_APB2>;
|
||||
resets = <&syscon ASPEED_RESET_I2C>;
|
||||
interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
|
||||
bus-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c13_default>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c13: i2c@700 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x700 0x80>;
|
||||
compatible = "aspeed,ast2600-i2c-bus";
|
||||
clocks = <&syscon ASPEED_CLK_APB2>;
|
||||
resets = <&syscon ASPEED_RESET_I2C>;
|
||||
interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
|
||||
bus-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c14_default>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c14: i2c@780 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x780 0x80>;
|
||||
compatible = "aspeed,ast2600-i2c-bus";
|
||||
clocks = <&syscon ASPEED_CLK_APB2>;
|
||||
resets = <&syscon ASPEED_RESET_I2C>;
|
||||
interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
|
||||
bus-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c15_default>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c15: i2c@800 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x800 0x80>;
|
||||
compatible = "aspeed,ast2600-i2c-bus";
|
||||
clocks = <&syscon ASPEED_CLK_APB2>;
|
||||
resets = <&syscon ASPEED_RESET_I2C>;
|
||||
interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
|
||||
bus-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c16_default>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
bus@1e7a0000 {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0x1e7a0000 0x8000>;
|
||||
|
||||
i3c_global: syscon@0 {
|
||||
compatible = "aspeed,ast2600-i3c-global", "syscon";
|
||||
reg = <0x0 0x1000>;
|
||||
resets = <&syscon ASPEED_RESET_I3C_DMA>;
|
||||
};
|
||||
|
||||
i3c0: i3c@2000 {
|
||||
compatible = "aspeed,ast2600-i3c";
|
||||
reg = <0x2000 0x1000>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&syscon ASPEED_CLK_GATE_I3C0CLK>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i3c1_default>;
|
||||
interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
|
||||
aspeed,global-regs = <&i3c_global 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i3c1: i3c@3000 {
|
||||
compatible = "aspeed,ast2600-i3c";
|
||||
reg = <0x3000 0x1000>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&syscon ASPEED_CLK_GATE_I3C1CLK>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i3c2_default>;
|
||||
interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
|
||||
aspeed,global-regs = <&i3c_global 1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i3c2: i3c@4000 {
|
||||
compatible = "aspeed,ast2600-i3c";
|
||||
reg = <0x4000 0x1000>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&syscon ASPEED_CLK_GATE_I3C2CLK>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i3c3_default>;
|
||||
interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
|
||||
aspeed,global-regs = <&i3c_global 2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i3c3: i3c@5000 {
|
||||
compatible = "aspeed,ast2600-i3c";
|
||||
reg = <0x5000 0x1000>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&syscon ASPEED_CLK_GATE_I3C3CLK>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i3c4_default>;
|
||||
interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
|
||||
aspeed,global-regs = <&i3c_global 3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i3c4: i3c@6000 {
|
||||
compatible = "aspeed,ast2600-i3c";
|
||||
reg = <0x6000 0x1000>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&syscon ASPEED_CLK_GATE_I3C4CLK>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i3c5_default>;
|
||||
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
|
||||
aspeed,global-regs = <&i3c_global 4>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i3c5: i3c@7000 {
|
||||
compatible = "aspeed,ast2600-i3c";
|
||||
reg = <0x7000 0x1000>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&syscon ASPEED_CLK_GATE_I3C5CLK>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i3c6_default>;
|
||||
interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
|
||||
aspeed,global-regs = <&i3c_global 5>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
fsim0: fsi@1e79b000 {
|
||||
|
|
@ -870,229 +1194,3 @@ fsim1: fsi@1e79b100 {
|
|||
};
|
||||
|
||||
#include "aspeed-g6-pinctrl.dtsi"
|
||||
|
||||
&i2c {
|
||||
i2c0: i2c@80 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x80 0x80>;
|
||||
compatible = "aspeed,ast2600-i2c-bus";
|
||||
clocks = <&syscon ASPEED_CLK_APB2>;
|
||||
resets = <&syscon ASPEED_RESET_I2C>;
|
||||
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
|
||||
bus-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c1_default>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c1: i2c@100 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x100 0x80>;
|
||||
compatible = "aspeed,ast2600-i2c-bus";
|
||||
clocks = <&syscon ASPEED_CLK_APB2>;
|
||||
resets = <&syscon ASPEED_RESET_I2C>;
|
||||
interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
|
||||
bus-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c2_default>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c2: i2c@180 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x180 0x80>;
|
||||
compatible = "aspeed,ast2600-i2c-bus";
|
||||
clocks = <&syscon ASPEED_CLK_APB2>;
|
||||
resets = <&syscon ASPEED_RESET_I2C>;
|
||||
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
|
||||
bus-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c3_default>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c3: i2c@200 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x200 0x80>;
|
||||
compatible = "aspeed,ast2600-i2c-bus";
|
||||
clocks = <&syscon ASPEED_CLK_APB2>;
|
||||
resets = <&syscon ASPEED_RESET_I2C>;
|
||||
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
|
||||
bus-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c4_default>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c4: i2c@280 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x280 0x80>;
|
||||
compatible = "aspeed,ast2600-i2c-bus";
|
||||
clocks = <&syscon ASPEED_CLK_APB2>;
|
||||
resets = <&syscon ASPEED_RESET_I2C>;
|
||||
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
|
||||
bus-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c5_default>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c5: i2c@300 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x300 0x80>;
|
||||
compatible = "aspeed,ast2600-i2c-bus";
|
||||
clocks = <&syscon ASPEED_CLK_APB2>;
|
||||
resets = <&syscon ASPEED_RESET_I2C>;
|
||||
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
|
||||
bus-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c6_default>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c6: i2c@380 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x380 0x80>;
|
||||
compatible = "aspeed,ast2600-i2c-bus";
|
||||
clocks = <&syscon ASPEED_CLK_APB2>;
|
||||
resets = <&syscon ASPEED_RESET_I2C>;
|
||||
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
|
||||
bus-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c7_default>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c7: i2c@400 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x400 0x80>;
|
||||
compatible = "aspeed,ast2600-i2c-bus";
|
||||
clocks = <&syscon ASPEED_CLK_APB2>;
|
||||
resets = <&syscon ASPEED_RESET_I2C>;
|
||||
interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
|
||||
bus-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c8_default>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c8: i2c@480 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x480 0x80>;
|
||||
compatible = "aspeed,ast2600-i2c-bus";
|
||||
clocks = <&syscon ASPEED_CLK_APB2>;
|
||||
resets = <&syscon ASPEED_RESET_I2C>;
|
||||
interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
|
||||
bus-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c9_default>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c9: i2c@500 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x500 0x80>;
|
||||
compatible = "aspeed,ast2600-i2c-bus";
|
||||
clocks = <&syscon ASPEED_CLK_APB2>;
|
||||
resets = <&syscon ASPEED_RESET_I2C>;
|
||||
interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
|
||||
bus-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c10_default>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c10: i2c@580 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x580 0x80>;
|
||||
compatible = "aspeed,ast2600-i2c-bus";
|
||||
clocks = <&syscon ASPEED_CLK_APB2>;
|
||||
resets = <&syscon ASPEED_RESET_I2C>;
|
||||
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
|
||||
bus-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c11_default>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c11: i2c@600 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x600 0x80>;
|
||||
compatible = "aspeed,ast2600-i2c-bus";
|
||||
clocks = <&syscon ASPEED_CLK_APB2>;
|
||||
resets = <&syscon ASPEED_RESET_I2C>;
|
||||
interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
|
||||
bus-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c12_default>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c12: i2c@680 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x680 0x80>;
|
||||
compatible = "aspeed,ast2600-i2c-bus";
|
||||
clocks = <&syscon ASPEED_CLK_APB2>;
|
||||
resets = <&syscon ASPEED_RESET_I2C>;
|
||||
interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
|
||||
bus-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c13_default>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c13: i2c@700 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x700 0x80>;
|
||||
compatible = "aspeed,ast2600-i2c-bus";
|
||||
clocks = <&syscon ASPEED_CLK_APB2>;
|
||||
resets = <&syscon ASPEED_RESET_I2C>;
|
||||
interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
|
||||
bus-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c14_default>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c14: i2c@780 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x780 0x80>;
|
||||
compatible = "aspeed,ast2600-i2c-bus";
|
||||
clocks = <&syscon ASPEED_CLK_APB2>;
|
||||
resets = <&syscon ASPEED_RESET_I2C>;
|
||||
interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
|
||||
bus-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c15_default>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c15: i2c@800 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x800 0x80>;
|
||||
compatible = "aspeed,ast2600-i2c-bus";
|
||||
clocks = <&syscon ASPEED_CLK_APB2>;
|
||||
resets = <&syscon ASPEED_RESET_I2C>;
|
||||
interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
|
||||
bus-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c16_default>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user