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drm/amd/pm: Use gpu_metrics_v1_8 for smu_v13_0_6
Use gpu_metrics_v1_8 for smu_v13_0_6 to fill metrics data v2: Move exposing caps to separate patch, move smu_v13.0.12 gpu metrics 1.8 usage to separate patch (Lijo) Signed-off-by: Asad Kamal <asad.kamal@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -507,7 +507,7 @@ static int smu_v13_0_6_tables_init(struct smu_context *smu)
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return -ENOMEM;
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smu_table->metrics_time = 0;
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smu_table->gpu_metrics_table_size = sizeof(struct gpu_metrics_v1_7);
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smu_table->gpu_metrics_table_size = sizeof(struct gpu_metrics_v1_8);
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smu_table->gpu_metrics_table =
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kzalloc(smu_table->gpu_metrics_table_size, GFP_KERNEL);
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if (!smu_table->gpu_metrics_table) {
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@ -2468,8 +2468,8 @@ static int smu_v13_0_6_get_current_pcie_link_speed(struct smu_context *smu)
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static ssize_t smu_v13_0_6_get_gpu_metrics(struct smu_context *smu, void **table)
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{
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struct smu_table_context *smu_table = &smu->smu_table;
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struct gpu_metrics_v1_7 *gpu_metrics =
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(struct gpu_metrics_v1_7 *)smu_table->gpu_metrics_table;
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struct gpu_metrics_v1_8 *gpu_metrics =
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(struct gpu_metrics_v1_8 *)smu_table->gpu_metrics_table;
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int version = smu_v13_0_6_get_metrics_version(smu);
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int ret = 0, xcc_id, inst, i, j, k, idx;
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struct amdgpu_device *adev = smu->adev;
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@ -2495,7 +2495,7 @@ static ssize_t smu_v13_0_6_get_gpu_metrics(struct smu_context *smu, void **table
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metrics_v1 = (MetricsTableV1_t *)metrics_v0;
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metrics_v2 = (MetricsTableV2_t *)metrics_v0;
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smu_cmn_init_soft_gpu_metrics(gpu_metrics, 1, 7);
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smu_cmn_init_soft_gpu_metrics(gpu_metrics, 1, 8);
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gpu_metrics->temperature_hotspot =
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SMUQ10_ROUND(GET_METRIC_FIELD(MaxSocketTemperature, version));
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@ -2648,6 +2648,20 @@ static ssize_t smu_v13_0_6_get_gpu_metrics(struct smu_context *smu, void **table
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gpu_metrics->xcp_stats[i].gfx_busy_acc[idx] =
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SMUQ10_ROUND(GET_GPU_METRIC_FIELD(GfxBusyAcc,
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version)[inst]);
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if (smu_v13_0_6_cap_supported(smu, SMU_CAP(HST_LIMIT_METRICS))) {
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gpu_metrics->xcp_stats[i].gfx_below_host_limit_ppt_acc[idx] =
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SMUQ10_ROUND
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(metrics_v0->GfxclkBelowHostLimitPptAcc[inst]);
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gpu_metrics->xcp_stats[i].gfx_below_host_limit_thm_acc[idx] =
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SMUQ10_ROUND
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(metrics_v0->GfxclkBelowHostLimitThmAcc[inst]);
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gpu_metrics->xcp_stats[i].gfx_low_utilization_acc[idx] =
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SMUQ10_ROUND
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(metrics_v0->GfxclkLowUtilizationAcc[inst]);
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gpu_metrics->xcp_stats[i].gfx_below_host_limit_total_acc[idx] =
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SMUQ10_ROUND
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(metrics_v0->GfxclkBelowHostLimitTotalAcc[inst]);
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}
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idx++;
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}
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}
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@ -65,6 +65,7 @@ enum smu_v13_0_6_caps {
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SMU_CAP(ACA_SYND),
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SMU_CAP(SDMA_RESET),
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SMU_CAP(STATIC_METRICS),
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SMU_CAP(HST_LIMIT_METRICS),
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SMU_CAP(ALL),
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};
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