mirror of
https://github.com/torvalds/linux.git
synced 2026-07-30 03:01:41 +02:00
arm64: dts: imx8mp-evk: Disable PCIe bus in the default dts
Disable the PCIe bus in the default device tree to avoid shared regulator conflicts between SDIO and PCIe buses. The non-deterministic probe order between these two buses can break the PCIe initialization sequence, causing PCIe devices to fail detection intermittently. On i.MX8MP EVK board, the M.2 connector is physically wired to both USDHC1 and PCIe0, however the out-of-box module is SDIO IW612 WiFi, so enable the SDIO WiFi in the default imx8mp-evk.dts. Add 'm2_usdhc' label to USDHC1 to support device tree overlay for PCIe modules. Users who need PCIe can use imx8mp-evk-pcie.dtb (added in a follow-up patch) which applies an overlay to enable PCIe and disable USDHC1. Signed-off-by: Sherry Sun <sherry.sun@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
This commit is contained in:
parent
9a8f11f6f7
commit
0549cdb08a
|
|
@ -774,7 +774,7 @@ &pcie0 {
|
|||
vpcie-supply = <®_pcie0>;
|
||||
vpcie3v3aux-supply = <®_pcie0>;
|
||||
supports-clkreq;
|
||||
status = "okay";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pcie0_ep {
|
||||
|
|
@ -870,7 +870,7 @@ &uart3 {
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
&usdhc1 {
|
||||
m2_usdhc: &usdhc1 {
|
||||
pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
||||
pinctrl-0 = <&pinctrl_usdhc1>;
|
||||
pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user