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clk: renesas: r9a08g046: Add IA55_PCLK to critical module clocks

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Add R9A08G046_IA55_PCLK to the critical module clocks list to prevent
the clock from being gated during suspend, as it is required for the
interrupt controller (IA55) to function correctly.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260430100838.157306-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Biju Das 2026-04-30 11:08:16 +01:00 committed by Geert Uytterhoeven
parent 6edb69b808
commit 01a20f1c46
1 changed files with 1 additions and 0 deletions
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drivers/clk/renesas/r9a08g046-cpg.c
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@ -312,6 +312,7 @@ static const struct rzg2l_reset r9a08g046_resets[] = {
static const unsigned int r9a08g046_crit_mod_clks[] __initconst = {
MOD_CLK_BASE + R9A08G046_GIC600_GICCLK,
MOD_CLK_BASE + R9A08G046_IA55_PCLK,
MOD_CLK_BASE + R9A08G046_IA55_CLK,
MOD_CLK_BASE + R9A08G046_DMAC_ACLK,
};