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TI K3 device tree updates for v7.2
SoC Specific Features and Fixes: J722S: - Use ti,j7200-padconf compatible for pad configuration - Add MCU and wakeup domain peripherals specific to J722S - Use J722S-specific compatibles for WIZ, gmii-sel and CPSW3G nodes Board Specific Features and Fixes: AM62x (Toradex Verdin): - Add display overlays: DSI-to-HDMI adapter, DSI-to-LVDS adapter with 10.1" panel, capacitive touch displays in 7" DSI, 10.1" DSI and 10.1" LVDS configurations, and Mezzanine with 10.1" LVDS display - Add NAU8822 Bridge Tied Load audio support - Add OV5640 CSI camera overlays - Add Verdin Mezzanine CAN overlay - Reserve UART_4 for Cortex-M4F use AM625: - Add support for TQ-Systems TQMa62xx SoM and MBa62xx carrier board, including new dt-bindings compatible strings AM62x (phyBOARD-Lyra): - Add DT overlay for Lincoln LCD185-101CT OLDI panel AM62-LP SK: - Add system-power-controller node AM62A7 SK: - Add bootph-all tag to vqmmc regulator for proper boot sequencing J721S2-som: - Add bootph-pre-ram property to PMIC-B for proper early boot sequencing -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEE+KKGk1TrgjIXoxo03bWEnRc2JJ0FAmogR3cACgkQ3bWEnRc2 JJ2uxg/8Cq1I66AnGNcIcGd3HeRRrD38Wh3BYdY1lboi8sl4c1LRnaztSMPAt629 m+W3c7GOi22PPpNxJX0xRnB3FHARp5M0804Hg1fW5fxE0V/YcC+9nVmpAlSoyjO1 qifUYVbtRLFDCvG+a7KRQDUAU2Q8RY9/Es+pVyvaJ6d2++xOcRGbONVh/kF24l56 QJV96ew0zDtio3gZO07MspoihEMnTTdsQYiER1kPBF0Al3OxLhF9787u4WSUJd0x 2F5mKw2UXW3xQ0i2+dmw8y81DmLIV6yyzaga/mUiC8k7DE0lxNAKAABlweidAEmd o8JJ2MxjN6fWyiIY10KTo/WFdkJx1a6itMxThDLKDt8Lj5Y0cvPPrDXGA5DBSPB9 0/B6/SucM0UjHlZUOqpSFmrKSOmF6P/HqB+6YzUf7acfjMmgLqFiaicUpptruS1C NL8rJ8l71kHbJhUnUIlrqoP9ELIaWGIUlg0oz48b2H5jYyDf2IXAKUjEsGuAlFsX si3aZl0DMXOi8LWlBiMb9w8y6G3TKmHHGm+0ATVW3uP8XWaKdoHK0xZeVrGfsYPa 86+HC/4m58wFZCc+ga3Nk/uSbazWBzVCcreVHm49e622rVvTTknajLBPlbKsMN+b qY5AOR8DGG4NSPDP9KF1dJVBXI+E3u9taKJGhlKRxQSkZ7S5jx0= =NfiJ -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmooN9IACgkQmmx57+YA GNmmRxAAxAvU3Pe4QWXYIbTnrz6waKTXQgEiwiaknXbhi/uc2k4qIN8f4DPRcnXU mZENpVsSVxJpDB/IoqqWLobq9ZCLnMkWSBDVTtfodKJQKy6GyaCfGKeARFdssD73 ixVb4wWtEfiJRRhFqwlcrI1On42vw2bhUL9PBmv5tVK68Ehf/BIN41e6ev7x79+b 81htJlHZBCd+a3UCVQkG3i6HmMPho6M1/C/weiw3KOsay3yuAZmcLdxRjjcqvmTE Rmgvv4IamlzKmyfP7b/XcKIrQv88L1uKFbcSNKfUg0NDBvSGrFfplrwVllfQv8NW TcNwP9P3R+9sz5jxl6G76IMnCqFXE+tlJ8juP5S7mRv/DMuZG7pkIVneXFXMEZjB qhw7vLdZnFxmyHdQNTGLZDkIXX4YanlcDia1zyFw5yOv2VUuz1cXRNXPj1AdoVq0 jb23yvRfz44NwFL61f5chchX/tjlKqUHYPC7a9zLnFEczDoj05m6wXizU8KTSPxC Pm7yt0A2G5+OsdoFFrRauLRumbGz+7fOVpQr0RqI2GJNB/ypFuYa+fQcQNfD4jVb D+aHaxkWb+lq54bmP98fZSEGLYrIV3myMCJqz6Qz6c9KXQT6jPZlNHuNxxG4MB0Z MZ3QFGom+flQeqj8g+iW+xDtM0oUkRaf4TzOdXPIR3A7tgeaI6w= =6Kjh -----END PGP SIGNATURE----- Merge tag 'ti-k3-dt-for-v7.2' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into soc/dt TI K3 device tree updates for v7.2 SoC Specific Features and Fixes: J722S: - Use ti,j7200-padconf compatible for pad configuration - Add MCU and wakeup domain peripherals specific to J722S - Use J722S-specific compatibles for WIZ, gmii-sel and CPSW3G nodes Board Specific Features and Fixes: AM62x (Toradex Verdin): - Add display overlays: DSI-to-HDMI adapter, DSI-to-LVDS adapter with 10.1" panel, capacitive touch displays in 7" DSI, 10.1" DSI and 10.1" LVDS configurations, and Mezzanine with 10.1" LVDS display - Add NAU8822 Bridge Tied Load audio support - Add OV5640 CSI camera overlays - Add Verdin Mezzanine CAN overlay - Reserve UART_4 for Cortex-M4F use AM625: - Add support for TQ-Systems TQMa62xx SoM and MBa62xx carrier board, including new dt-bindings compatible strings AM62x (phyBOARD-Lyra): - Add DT overlay for Lincoln LCD185-101CT OLDI panel AM62-LP SK: - Add system-power-controller node AM62A7 SK: - Add bootph-all tag to vqmmc regulator for proper boot sequencing J721S2-som: - Add bootph-pre-ram property to PMIC-B for proper early boot sequencing * tag 'ti-k3-dt-for-v7.2' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: arm64: dts: ti: k3-am62-verdin: Add Mezzanine with Toradex Display 10.1" LVDS arm64: dts: ti: k3-am62-verdin: Add Toradex Verdin Mezzanine CAN arm64: dts: ti: k3-am62-verdin: Add Toradex OV5640 CSI Cameras arm64: dts: ti: k3-am62-verdin: Reserve UART_4 for Cortex-M4F arm64: dts: ti: k3-am62-verdin: Add NAU8822 Bridge Tied Load arm64: dts: ti: k3-am62-verdin: Add Toradex Capacitive Touch Display 7" DSI arm64: dts: ti: k3-am62-verdin: Add Toradex Capacitive Touch Display 10.1" DSI arm64: dts: ti: k3-am62-verdin: Add Toradex Capacitive Touch Display 10.1" LVDS arm64: dts: ti: k3-am62-verdin: Add Toradex DSI to LVDS adapter with 10.1" display arm64: dts: ti: k3-j722s-main: use J722S compatibles for WIZ, gmii-sel and CPSW3G arm64: dts: ti: k3-am62-verdin: Add DSI to HDMI adapter overlay arm64: dts: ti: Add TQ-Systems TQMa62xx SoM and MBa62xx carrier board Device Trees dt-bindings: arm: ti: Add compatible for AM625-based TQMa62xx SOM family and carrier board arm64: dts: ti: am62-phyboard-lyra: Add DT overlay for Lincoln LCD185-101CT panel arm64: dts: ti: k3-j721s2-som-p0: add bootph-pre-ram property to PMIC-B arm64: dts: ti: k3-j722s: Add wakeup domain peripherals specific to J722S arm64: dts: ti: k3-j722s: Add mcu domain peripherals specific to J722S arm64: dts: ti: k3-j722s: Use ti,j7200-padconf compatible arm64: dts: ti: k3-am62-lp-sk: Add system-power-controller arm64: dts: ti: k3-am62a7-sk: Add bootph-all tag to vqmmc Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
commit
018450d76e
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@ -97,6 +97,13 @@ properties:
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- const: toradex,verdin-am62 # Verdin AM62 Module
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- const: ti,am625
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- description: K3 AM625 SoC on TQ-Systems TQMa62xx SoM
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items:
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- enum:
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- tq,am625-tqma6254-mba62xx # MBa62xx base board
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- const: tq,am625-tqma6254
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- const: ti,am625
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- description: K3 AM62P5 SoC Toradex Verdin Modules and Carrier Boards
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items:
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- enum:
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@ -9,18 +9,50 @@
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# alphabetically.
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# Boards with AM62x SoC
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k3-am625-verdin-nonwifi-dahlia-dsi-to-hdmi-dtbs := k3-am625-verdin-nonwifi-dahlia.dtb \
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k3-am625-verdin-dsi-to-hdmi.dtbo
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k3-am625-verdin-nonwifi-dahlia-panel-cap-touch-10inch-dsi-dtbs := \
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k3-am625-verdin-nonwifi-dahlia.dtb \
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k3-am625-verdin-panel-cap-touch-10inch-dsi.dtbo
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k3-am625-verdin-nonwifi-dev-dsi-to-hdmi-dtbs := k3-am625-verdin-nonwifi-dev.dtb \
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k3-am625-verdin-dsi-to-hdmi.dtbo
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k3-am625-verdin-wifi-dahlia-dsi-to-hdmi-dtbs := k3-am625-verdin-wifi-dahlia.dtb \
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k3-am625-verdin-dsi-to-hdmi.dtbo
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k3-am625-verdin-wifi-dahlia-panel-cap-touch-10inch-dsi-dtbs := \
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k3-am625-verdin-wifi-dahlia.dtb \
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k3-am625-verdin-panel-cap-touch-10inch-dsi.dtbo
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k3-am625-verdin-wifi-dev-dsi-to-hdmi-dtbs := k3-am625-verdin-wifi-dev.dtb \
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k3-am625-verdin-dsi-to-hdmi.dtbo
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dtb-$(CONFIG_ARCH_K3) += k3-am625-beagleplay.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am625-beagleplay-csi2-ov5640.dtbo
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dtb-$(CONFIG_ARCH_K3) += k3-am625-beagleplay-csi2-tevi-ov5640.dtbo
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dtb-$(CONFIG_ARCH_K3) += k3-am625-phyboard-lyra-rdk.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am625-sk.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am625-tqma62xx-mba62xx.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-dev-mezzanine-can.dtbo
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dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-dev-mezzanine-panel-cap-touch-10inch-lvds.dtbo
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dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-dev-nau8822-btl.dtbo
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dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-dsi-to-hdmi.dtbo
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dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-dsi-to-lvds-panel-cap-touch-10inch.dtbo
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dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-dahlia-dsi-to-hdmi.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-dahlia-panel-cap-touch-10inch-dsi.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-dahlia.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-dev-dsi-to-hdmi.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-dev.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-ivy.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-mallow.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-yavia.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-zinnia.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-ov5640-24mhz.dtbo
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dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-ov5640.dtbo
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dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-panel-cap-touch-10inch-dsi.dtbo
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dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-panel-cap-touch-10inch-lvds.dtbo
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dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-panel-cap-touch-7inch-dsi.dtbo
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dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-uart4-mcu.dtbo
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dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-dahlia-dsi-to-hdmi.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-dahlia-panel-cap-touch-10inch-dsi.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-dahlia.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-dev-dsi-to-hdmi.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-dev.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-ivy.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-mallow.dtb
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@ -29,6 +61,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-zinnia.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am62x-phyboard-lyra-gpio-fan.dtbo
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dtb-$(CONFIG_ARCH_K3) += k3-am62-lp-sk.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am62-lp-sk-nand.dtbo
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dtb-$(CONFIG_ARCH_K3) += k3-am62-phyboard-lyra-oldi-lcd185.dtbo
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dtb-$(CONFIG_ARCH_K3) += k3-am62-pocketbeagle2.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am6254atl-sk.dtb
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@ -183,6 +216,8 @@ k3-am625-phyboard-lyra-disable-spi-nor-dtbs := k3-am625-phyboard-lyra-rdk.dtb \
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k3-am6xx-phycore-disable-spi-nor.dtbo
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k3-am625-phyboard-lyra-gpio-fan-dtbs := k3-am625-phyboard-lyra-rdk.dtb \
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k3-am62x-phyboard-lyra-gpio-fan.dtbo
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k3-am625-phyboard-lyra-oldi-lcd185-dtbs := k3-am625-phyboard-lyra-rdk.dtb \
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k3-am62-phyboard-lyra-oldi-lcd185.dtbo
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k3-am625-phyboard-lyra-qspi-nor-dtbs := k3-am625-phyboard-lyra-rdk.dtb \
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k3-am6xx-phycore-qspi-nor.dtbo
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k3-am625-sk-csi2-imx219-dtbs := k3-am625-sk.dtb \
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@ -192,6 +227,28 @@ k3-am625-sk-csi2-ov5640-dtbs := k3-am625-sk.dtb \
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k3-am625-sk-csi2-tevi-ov5640-dtbs := k3-am625-sk.dtb \
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k3-am62x-sk-csi2-tevi-ov5640.dtbo
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k3-am625-sk-hdmi-audio-dtbs := k3-am625-sk.dtb k3-am62x-sk-hdmi-audio.dtbo
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k3-am625-verdin-wifi-dev-dsi-to-lvds-panel-cap-touch-10inch-dtbs := \
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k3-am625-verdin-wifi-dev.dtb \
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k3-am625-verdin-dsi-to-lvds-panel-cap-touch-10inch.dtbo
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k3-am625-verdin-wifi-dev-mezzanine-can-dtbs := k3-am625-verdin-wifi-dev.dtb \
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k3-am625-verdin-dev-mezzanine-can.dtbo
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k3-am625-verdin-wifi-dev-mezzanine-panel-cap-touch-10inch-lvds-dtbs := \
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k3-am625-verdin-wifi-dev.dtb \
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k3-am625-verdin-dev-mezzanine-panel-cap-touch-10inch-lvds.dtbo
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k3-am625-verdin-wifi-dev-nau8822-btl-dtbs := k3-am625-verdin-wifi-dev.dtb \
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k3-am625-verdin-dev-nau8822-btl.dtbo
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k3-am625-verdin-wifi-dev-ov5640-24mhz-dtbs := k3-am625-verdin-wifi-dev.dtb \
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k3-am625-verdin-ov5640-24mhz.dtbo
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k3-am625-verdin-wifi-dev-ov5640-dtbs := k3-am625-verdin-wifi-dev.dtb \
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k3-am625-verdin-ov5640.dtbo
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k3-am625-verdin-wifi-dev-panel-cap-touch-7inch-dsi-dtbs := \
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k3-am625-verdin-wifi-dev.dtb \
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k3-am625-verdin-panel-cap-touch-7inch-dsi.dtbo
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k3-am625-verdin-wifi-dev-uart4-mcu-dtbs := k3-am625-verdin-wifi-dev.dtb \
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k3-am625-verdin-uart4-mcu.dtbo
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k3-am625-verdin-wifi-mallow-panel-cap-touch-10inch-lvds-dtbs := \
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k3-am625-verdin-wifi-mallow.dtb \
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k3-am625-verdin-panel-cap-touch-10inch-lvds.dtbo
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k3-am62-lp-sk-hdmi-audio-dtbs := k3-am62-lp-sk.dtb k3-am62x-sk-hdmi-audio.dtbo
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k3-am62-lp-sk-nand-dtbs := k3-am62-lp-sk.dtb k3-am62-lp-sk-nand.dtbo
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k3-am62a7-phyboard-lyra-disable-eth-phy-dtbs := k3-am62a7-phyboard-lyra-rdk.dtb \
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@ -287,11 +344,21 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \
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k3-am625-phyboard-lyra-disable-rtc.dtb \
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k3-am625-phyboard-lyra-disable-spi-nor.dtb \
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k3-am625-phyboard-lyra-gpio-fan.dtb \
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k3-am625-phyboard-lyra-oldi-lcd185.dtb \
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k3-am625-phyboard-lyra-qspi-nor.dtb \
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k3-am625-sk-csi2-imx219.dtb \
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k3-am625-sk-csi2-ov5640.dtb \
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k3-am625-sk-csi2-tevi-ov5640.dtb \
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k3-am625-sk-hdmi-audio.dtb \
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k3-am625-verdin-wifi-dev-dsi-to-lvds-panel-cap-touch-10inch.dtb \
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k3-am625-verdin-wifi-dev-mezzanine-can.dtb \
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k3-am625-verdin-wifi-dev-mezzanine-panel-cap-touch-10inch-lvds.dtb \
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k3-am625-verdin-wifi-dev-nau8822-btl.dtb \
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k3-am625-verdin-wifi-dev-ov5640-24mhz.dtb \
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k3-am625-verdin-wifi-dev-ov5640.dtb \
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k3-am625-verdin-wifi-dev-panel-cap-touch-7inch-dsi.dtb \
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k3-am625-verdin-wifi-dev-uart4-mcu.dtb \
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k3-am625-verdin-wifi-mallow-panel-cap-touch-10inch-lvds.dtb \
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k3-am62-lp-sk-hdmi-audio.dtb \
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k3-am62-lp-sk-nand.dtb \
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k3-am62a7-phyboard-lyra-disable-eth-phy.dtb \
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@ -206,6 +206,7 @@ tps65219: pmic@30 {
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interrupt-parent = <&gic500>;
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interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
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system-power-controller;
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regulators {
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buck1_reg: buck1 {
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185
arch/arm64/boot/dts/ti/k3-am62-phyboard-lyra-oldi-lcd185.dtso
Normal file
185
arch/arm64/boot/dts/ti/k3-am62-phyboard-lyra-oldi-lcd185.dtso
Normal file
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@ -0,0 +1,185 @@
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// SPDX-License-Identifier: GPL-2.0-only OR MIT
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/*
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* Copyright (C) 2022-2026 PHYTEC Messtechnik GmbH
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* Author: Wadim Egorov <w.egorov@phytec.de>
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*/
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/dts-v1/;
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/plugin/;
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#include <dt-bindings/pwm/pwm.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include "k3-pinctrl.h"
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&{/} {
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display {
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compatible = "lincolntech,lcd185-101ct";
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backlight = <&backlight>;
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power-supply = <&vdd_usb_5v0>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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dual-lvds-odd-pixels;
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lcd_in0: endpoint {
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remote-endpoint = <&oldi_0_out>;
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};
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};
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port@1 {
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reg = <1>;
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dual-lvds-even-pixels;
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lcd_in1: endpoint {
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remote-endpoint = <&oldi_1_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
backlight: backlight {
|
||||
compatible = "pwm-backlight";
|
||||
brightness-levels = <0 4 8 16 32 64 128 255>;
|
||||
default-brightness-level = <6>;
|
||||
enable-gpios = <&gpio_exp 5 GPIO_ACTIVE_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&bl_pwm_pins_default>;
|
||||
pwms = <&epwm0 1 50000 0>;
|
||||
};
|
||||
|
||||
vdd_usb_5v0: regulator-vdd-usb5v0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vdd-usb5v0";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
};
|
||||
|
||||
&dss {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_oldi0_pins_default>, <&main_dss0_pins_default>;
|
||||
};
|
||||
|
||||
&dss_ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
/* VP1: Output to OLDI */
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
dpi0_out0: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&oldi_0_in>;
|
||||
};
|
||||
|
||||
dpi0_out1: endpoint@1 {
|
||||
reg = <1>;
|
||||
remote-endpoint = <&oldi_1_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&epwm0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&main_i2c1 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
touchscreen@5d {
|
||||
compatible = "goodix,gt928";
|
||||
reg = <0x5d>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&touch_screen_pins_default>;
|
||||
|
||||
interrupt-parent = <&main_gpio0>;
|
||||
interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
|
||||
|
||||
reset-gpios = <&main_gpio0 18 GPIO_ACTIVE_HIGH>;
|
||||
irq-gpios = <&main_gpio0 19 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
&main_pmx0 {
|
||||
bl_pwm_pins_default: bl-pwm-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x01b8, PIN_INPUT, 2) /* (C13) SPI0_CS1.EHRPWM0_B */
|
||||
>;
|
||||
};
|
||||
|
||||
touch_screen_pins_default: touch-screen-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x048, PIN_OUTPUT, 7) /* (N25) GPMC0_AD3.GPIO0_18 - RST */
|
||||
AM62X_IOPAD(0x04c, PIN_INPUT, 7) /* (P24) GPMC0_AD4.GPIO0_19 - INT */
|
||||
>;
|
||||
};
|
||||
|
||||
main_oldi0_pins_default: main-oldi0-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x0260, PIN_OUTPUT, 0) /* (AA5) OLDI0_A0N */
|
||||
AM62X_IOPAD(0x025c, PIN_OUTPUT, 0) /* (Y6) OLDI0_A0P */
|
||||
AM62X_IOPAD(0x0268, PIN_OUTPUT, 0) /* (AD3) OLDI0_A1N */
|
||||
AM62X_IOPAD(0x0264, PIN_OUTPUT, 0) /* (AB4) OLDI0_A1P */
|
||||
AM62X_IOPAD(0x0270, PIN_OUTPUT, 0) /* (Y8) OLDI0_A2N */
|
||||
AM62X_IOPAD(0x026c, PIN_OUTPUT, 0) /* (AA8) OLDI0_A2P */
|
||||
AM62X_IOPAD(0x0278, PIN_OUTPUT, 0) /* (AB6) OLDI0_A3N */
|
||||
AM62X_IOPAD(0x0274, PIN_OUTPUT, 0) /* (AA7) OLDI0_A3P */
|
||||
AM62X_IOPAD(0x0280, PIN_OUTPUT, 0) /* (AC6) OLDI0_A4N */
|
||||
AM62X_IOPAD(0x027c, PIN_OUTPUT, 0) /* (AC5) OLDI0_A4P */
|
||||
AM62X_IOPAD(0x0288, PIN_OUTPUT, 0) /* (AE5) OLDI0_A5N */
|
||||
AM62X_IOPAD(0x0284, PIN_OUTPUT, 0) /* (AD6) OLDI0_A5P */
|
||||
AM62X_IOPAD(0x0290, PIN_OUTPUT, 0) /* (AE6) OLDI0_A6N */
|
||||
AM62X_IOPAD(0x028c, PIN_OUTPUT, 0) /* (AD7) OLDI0_A6P */
|
||||
AM62X_IOPAD(0x0298, PIN_OUTPUT, 0) /* (AD8) OLDI0_A7N */
|
||||
AM62X_IOPAD(0x0294, PIN_OUTPUT, 0) /* (AE7) OLDI0_A7P */
|
||||
AM62X_IOPAD(0x02a0, PIN_OUTPUT, 0) /* (AD4) OLDI0_CLK0N */
|
||||
AM62X_IOPAD(0x029c, PIN_OUTPUT, 0) /* (AE3) OLDI0_CLK0P */
|
||||
AM62X_IOPAD(0x02a8, PIN_OUTPUT, 0) /* (AE4) OLDI0_CLK1N */
|
||||
AM62X_IOPAD(0x02a4, PIN_OUTPUT, 0) /* (AD5) OLDI0_CLK1P */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&oldi0 {
|
||||
ti,companion-oldi = <&oldi1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&oldi0_port0 {
|
||||
oldi_0_in: endpoint {
|
||||
remote-endpoint = <&dpi0_out0>;
|
||||
};
|
||||
};
|
||||
|
||||
&oldi0_port1 {
|
||||
oldi_0_out: endpoint {
|
||||
remote-endpoint = <&lcd_in0>;
|
||||
};
|
||||
};
|
||||
|
||||
&oldi1 {
|
||||
ti,secondary-oldi;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&oldi1_port0 {
|
||||
oldi_1_in: endpoint {
|
||||
remote-endpoint = <&dpi0_out1>;
|
||||
};
|
||||
};
|
||||
|
||||
&oldi1_port1 {
|
||||
oldi_1_out: endpoint {
|
||||
remote-endpoint = <&lcd_in1>;
|
||||
};
|
||||
};
|
||||
1033
arch/arm64/boot/dts/ti/k3-am625-tqma62xx-mba62xx.dts
Normal file
1033
arch/arm64/boot/dts/ti/k3-am625-tqma62xx-mba62xx.dts
Normal file
File diff suppressed because it is too large
Load Diff
360
arch/arm64/boot/dts/ti/k3-am625-tqma62xx.dtsi
Normal file
360
arch/arm64/boot/dts/ti/k3-am625-tqma62xx.dtsi
Normal file
|
|
@ -0,0 +1,360 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-only OR MIT
|
||||
/*
|
||||
* Copyright (C) 2021-2022 Texas Instruments Incorporated - https://www.ti.com/
|
||||
* Copyright (c) 2023-2026 TQ-Systems GmbH <linux@ew.tq-group.com>, D-82229 Seefeld, Germany.
|
||||
* Author: Nora Schiffer
|
||||
*/
|
||||
|
||||
#include "k3-am625.dtsi"
|
||||
|
||||
/ {
|
||||
aliases {
|
||||
i2c0 = &main_i2c0;
|
||||
mmc0 = &sdhci0;
|
||||
spi0 = &ospi0;
|
||||
};
|
||||
|
||||
memory@80000000 {
|
||||
device_type = "memory";
|
||||
/* 1G RAM */
|
||||
reg = <0x00000000 0x80000000 0x00000000 0x40000000>;
|
||||
bootph-pre-ram;
|
||||
};
|
||||
|
||||
reserved_memory: reserved-memory {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
ramoops@9c700000 {
|
||||
compatible = "ramoops";
|
||||
reg = <0x00 0x9c700000 0x00 0x00100000>;
|
||||
record-size = <0x8000>;
|
||||
console-size = <0x8000>;
|
||||
ftrace-size = <0x00>;
|
||||
pmsg-size = <0x8000>;
|
||||
};
|
||||
|
||||
/* global cma region */
|
||||
linux,cma {
|
||||
compatible = "shared-dma-pool";
|
||||
reusable;
|
||||
size = <0x00 0x8000000>;
|
||||
linux,cma-default;
|
||||
};
|
||||
|
||||
rtos_ipc_memory_region: memory@9c800000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0x9c800000 0x00 0x00300000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
wkup_r5fss0_core0_dma_memory_region: memory@9da00000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0x9da00000 0x00 0x100000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
wkup_r5fss0_core0_memory_region: memory@9db00000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0x9db00000 0x00 0xc00000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
secure_tfa_ddr: tfa@9e780000 {
|
||||
reg = <0x00 0x9e780000 0x00 0x80000>;
|
||||
alignment = <0x1000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
secure_ddr: optee@9e800000 {
|
||||
reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
|
||||
alignment = <0x1000>;
|
||||
no-map;
|
||||
};
|
||||
};
|
||||
|
||||
reg_3v3: regulator-3v3 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "V_3V3";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
reg_sd: regulator-sd {
|
||||
/* Output of TPS6521902RSM */
|
||||
compatible = "regulator-gpio";
|
||||
regulator-name = "V_VDDSHV5";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
vin-supply = <®_ldo1>;
|
||||
states = <1800000 0x0>,
|
||||
<3300000 0x1>;
|
||||
/* Controlling GPIO set by base board */
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
&main_i2c0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_i2c0_pins>;
|
||||
clock-frequency = <400000>;
|
||||
bootph-pre-ram;
|
||||
status = "okay";
|
||||
|
||||
tps65219: pmic@30 {
|
||||
compatible = "ti,tps65219";
|
||||
reg = <0x30>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pmic_irq_pins>;
|
||||
interrupt-parent = <&gic500>;
|
||||
interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
buck1-supply = <®_3v3>;
|
||||
buck2-supply = <®_3v3>;
|
||||
buck3-supply = <®_3v3>;
|
||||
ldo1-supply = <®_3v3>;
|
||||
ldo2-supply = <®_buck2>;
|
||||
ldo3-supply = <®_3v3>;
|
||||
ldo4-supply = <®_3v3>;
|
||||
system-power-controller;
|
||||
ti,power-button;
|
||||
|
||||
regulators {
|
||||
reg_buck1: buck1 {
|
||||
regulator-name = "V_VDD_CORE";
|
||||
regulator-min-microvolt = <750000>;
|
||||
regulator-max-microvolt = <750000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_buck2: buck2 {
|
||||
regulator-name = "V_1V8";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_buck3: buck3 {
|
||||
regulator-name = "V_1V1";
|
||||
regulator-min-microvolt = <1100000>;
|
||||
regulator-max-microvolt = <1100000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_ldo1: ldo1 {
|
||||
/* Actual voltage of LDO1 is controlled by GPIO, see reg_sd */
|
||||
regulator-name = "V_VDDSHV5_3V3";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-allow-bypass;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_ldo2: ldo2 {
|
||||
regulator-name = "V_0V85";
|
||||
regulator-min-microvolt = <850000>;
|
||||
regulator-max-microvolt = <850000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_ldo3: ldo3 {
|
||||
regulator-name = "V_1V8A";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_ldo4: ldo4 {
|
||||
/* Unused */
|
||||
regulator-name = "V_VLDO4";
|
||||
regulator-boot-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
tmp1075: temperature-sensor@4a {
|
||||
compatible = "ti,tmp1075";
|
||||
reg = <0x4a>;
|
||||
vs-supply = <®_buck2>;
|
||||
};
|
||||
|
||||
eeprom0: eeprom@50 {
|
||||
compatible = "st,24c02", "atmel,24c02";
|
||||
reg = <0x50>;
|
||||
vcc-supply = <®_buck2>;
|
||||
pagesize = <16>;
|
||||
read-only;
|
||||
bootph-pre-ram;
|
||||
};
|
||||
|
||||
pcf85063: rtc@51 {
|
||||
compatible = "nxp,pcf85063a";
|
||||
reg = <0x51>;
|
||||
quartz-load-femtofarads = <12500>;
|
||||
};
|
||||
|
||||
eeprom1: eeprom@54 {
|
||||
compatible = "st,24c64", "atmel,24c64";
|
||||
reg = <0x54>;
|
||||
vcc-supply = <®_buck2>;
|
||||
pagesize = <32>;
|
||||
};
|
||||
};
|
||||
|
||||
&a53_opp_table {
|
||||
opp-1400000000 {
|
||||
opp-hz = /bits/ 64 <1400000000>;
|
||||
opp-supported-hw = <0x01 0x0004>;
|
||||
opp-suspend;
|
||||
clock-latency-ns = <6000000>;
|
||||
/*
|
||||
* Enabled by bootloader if supported. The PMIC configuration
|
||||
* will be adjusted accordingly, as a higher core voltage is
|
||||
* required for 1400MHz operation.
|
||||
*/
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
&ospi0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&ospi0_pins>;
|
||||
bootph-all;
|
||||
status = "okay";
|
||||
|
||||
flash@0 {
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0x0>;
|
||||
vcc-supply = <®_buck2>;
|
||||
spi-tx-bus-width = <8>;
|
||||
spi-rx-bus-width = <8>;
|
||||
spi-max-frequency = <84000000>;
|
||||
bootph-all;
|
||||
cdns,tshsl-ns = <60>;
|
||||
cdns,tsd2d-ns = <60>;
|
||||
cdns,tchsh-ns = <60>;
|
||||
cdns,tslch-ns = <60>;
|
||||
cdns,read-delay = <2>;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
/* Filled by bootloader */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&sdhci0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_mmc0_pins>;
|
||||
non-removable;
|
||||
disable-wp;
|
||||
no-sd;
|
||||
no-sdio;
|
||||
bootph-all;
|
||||
ti,driver-strength-ohm = <50>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wkup_rtc0 {
|
||||
/*
|
||||
* Erratum i2327: We can't guarantee that the TQMa62xx will boot fast
|
||||
* enough for U-Boot to apply the workaround within one second after
|
||||
* power-on. Keep the RTC disabled to avoid RTC interrupt issues.
|
||||
*
|
||||
* The external RTC of the TQMa62xx should be used instead.
|
||||
*
|
||||
* If needed, the RTC can be enabled in a baseboard DTS, as long as
|
||||
* boot is fast enough on all relevant boot media.
|
||||
*/
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&main_pmx0 {
|
||||
main_i2c0_pins: main-i2c0-pins {
|
||||
pinctrl-single,pins = <
|
||||
/* (B16) I2C0_SCL */
|
||||
AM62X_IOPAD(0x1e0, PIN_INPUT, 0)
|
||||
/* (A16) I2C0_SDA */
|
||||
AM62X_IOPAD(0x1e4, PIN_INPUT, 0)
|
||||
>;
|
||||
bootph-pre-ram;
|
||||
};
|
||||
|
||||
main_mmc0_pins: main-mmc0-pins {
|
||||
pinctrl-single,pins = <
|
||||
/* (Y3) MMC0_CMD */
|
||||
AM62X_IOPAD(0x220, PIN_INPUT, 0)
|
||||
/* (AB1) MMC0_CLK */
|
||||
AM62X_IOPAD(0x218, PIN_INPUT, 0)
|
||||
/* (AA2) MMC0_DAT0 */
|
||||
AM62X_IOPAD(0x214, PIN_INPUT, 0)
|
||||
/* (AA1) MMC0_DAT1 */
|
||||
AM62X_IOPAD(0x210, PIN_INPUT, 0)
|
||||
/* (AA3) MMC0_DAT2 */
|
||||
AM62X_IOPAD(0x20c, PIN_INPUT, 0)
|
||||
/* (Y4) MMC0_DAT3 */
|
||||
AM62X_IOPAD(0x208, PIN_INPUT, 0)
|
||||
/* (AB2) MMC0_DAT4 */
|
||||
AM62X_IOPAD(0x204, PIN_INPUT, 0)
|
||||
/* (AC1) MMC0_DAT5 */
|
||||
AM62X_IOPAD(0x200, PIN_INPUT, 0)
|
||||
/* (AD2) MMC0_DAT6 */
|
||||
AM62X_IOPAD(0x1fc, PIN_INPUT, 0)
|
||||
/* (AC2) MMC0_DAT7 */
|
||||
AM62X_IOPAD(0x1f8, PIN_INPUT, 0)
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
ospi0_pins: ospi0-pins {
|
||||
pinctrl-single,pins = <
|
||||
/* (H24) OSPI0_CLK */
|
||||
AM62X_IOPAD(0x000, PIN_OUTPUT, 0)
|
||||
/* (F23) OSPI0_CSn0 */
|
||||
AM62X_IOPAD(0x02c, PIN_OUTPUT, 0)
|
||||
/* (E25) OSPI0_D0 */
|
||||
AM62X_IOPAD(0x00c, PIN_INPUT, 0)
|
||||
/* (G24) OSPI0_D1 */
|
||||
AM62X_IOPAD(0x010, PIN_INPUT, 0)
|
||||
/* (F25) OSPI0_D2 */
|
||||
AM62X_IOPAD(0x014, PIN_INPUT, 0)
|
||||
/* (F24) OSPI0_D3 */
|
||||
AM62X_IOPAD(0x018, PIN_INPUT, 0)
|
||||
/* (J23) OSPI0_D4 */
|
||||
AM62X_IOPAD(0x01c, PIN_INPUT, 0)
|
||||
/* (J25) OSPI0_D5 */
|
||||
AM62X_IOPAD(0x020, PIN_INPUT, 0)
|
||||
/* (H25) OSPI0_D6 */
|
||||
AM62X_IOPAD(0x024, PIN_INPUT, 0)
|
||||
/* (J22) OSPI0_D7 */
|
||||
AM62X_IOPAD(0x028, PIN_INPUT, 0)
|
||||
/* (J24) OSPI0_DQS */
|
||||
AM62X_IOPAD(0x008, PIN_INPUT, 0)
|
||||
/* (G25) OSPI0_LBCLKO */
|
||||
AM62X_IOPAD(0x004, PIN_INPUT, 0)
|
||||
>;
|
||||
};
|
||||
|
||||
pmic_irq_pins: pmic-irq-pins {
|
||||
pinctrl-single,pins = <
|
||||
/* (D16) EXTINTn */
|
||||
AM62X_IOPAD(0x01f4, PIN_INPUT_PULLUP, 0)
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
#include "k3-am62-ti-ipc-firmware.dtsi"
|
||||
|
|
@ -0,0 +1,28 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
/*
|
||||
* Copyright (c) Toradex
|
||||
*
|
||||
* Enable AM62 MCU_MCAN1 exposed on Toradex Verdin Development Board with
|
||||
* Verdin AM62 Mezzanine expansion board on CAN Header (J13),
|
||||
* Pin 3 (CAN1_CONN_N) and Pin 4 (CAN1_CONN_P).
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include "k3-pinctrl.h"
|
||||
|
||||
&mcu_pmx0 {
|
||||
pinctrl_mcu_mcan1: mcu-mcan1-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_MCU_IOPAD(0x0040, PIN_INPUT, 0) /* (D4) MCU_MCAN1_RX (SODIMM 116) */
|
||||
AM62X_MCU_IOPAD(0x003c, PIN_OUTPUT, 0) /* (E5) MCU_MCAN1_TX (SODIMM 128) */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&mcu_mcan1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_mcu_mcan1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -0,0 +1,98 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
/*
|
||||
* Copyright (c) Toradex
|
||||
*
|
||||
* Toradex Capacitive Touch Display 10.1" LVDS on the Verdin AM62 Mezzanine
|
||||
* LVDS interface (J10), used with the Verdin Development Board.
|
||||
*
|
||||
* https://developer.toradex.com/hardware/accessories/displays/capacitive-touch-display-101inch-lvds
|
||||
* https://www.toradex.com/accessories/capacitive-touch-display-10.1-inch-lvds
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/pwm/pwm.h>
|
||||
|
||||
&{/} {
|
||||
backlight_pwm2: backlight-pwm2 {
|
||||
compatible = "pwm-backlight";
|
||||
brightness-levels = <0 45 63 88 119 158 203 255>;
|
||||
default-brightness-level = <4>;
|
||||
/* Verdin GPIO_4 (SODIMM 212) - LVDS_BKL_EN */
|
||||
enable-gpios = <&mcu_gpio0 4 GPIO_ACTIVE_HIGH>;
|
||||
/* Verdin PWM_2 (SODIMM 16) - LVDS_PWM */
|
||||
pwms = <&epwm0 1 6666667 PWM_POLARITY_INVERTED>;
|
||||
};
|
||||
|
||||
panel-lvds-native {
|
||||
compatible = "logictechno,lt170410-2whc";
|
||||
backlight = <&backlight_pwm2>;
|
||||
power-supply = <®_3v3_lvds>;
|
||||
|
||||
port {
|
||||
panel_lvds_native_in: endpoint {
|
||||
remote-endpoint = <&oldi0_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
reg_3v3_lvds: regulator-3v3-lvds {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-name = "+V3.3_LVDS";
|
||||
};
|
||||
};
|
||||
|
||||
&dss {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dss_ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
/* DSS VP1: internal DPI output to OLDIx */
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
|
||||
dss0_out: endpoint {
|
||||
remote-endpoint = <&oldi0_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* Verdin I2C_2_DSI */
|
||||
&main_i2c2 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
touchscreen@4a {
|
||||
compatible = "atmel,maxtouch";
|
||||
reg = <0x4a>;
|
||||
/* Verdin GPIO_3 (SODIMM 210) - LVDS_TOUCH_INT# */
|
||||
interrupt-parent = <&mcu_gpio0>;
|
||||
interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
|
||||
/* Verdin GPIO_2 (SODIMM 208) - LVDS_TOUCH_RST# */
|
||||
reset-gpios = <&mcu_gpio0 2 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
&oldi0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&oldi0_port0 {
|
||||
oldi0_in: endpoint {
|
||||
remote-endpoint = <&dss0_out>;
|
||||
};
|
||||
};
|
||||
|
||||
&oldi0_port1 {
|
||||
oldi0_out: endpoint {
|
||||
remote-endpoint = <&panel_lvds_native_in>;
|
||||
};
|
||||
};
|
||||
14
arch/arm64/boot/dts/ti/k3-am625-verdin-dev-nau8822-btl.dtso
Normal file
14
arch/arm64/boot/dts/ti/k3-am625-verdin-dev-nau8822-btl.dtso
Normal file
|
|
@ -0,0 +1,14 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
/*
|
||||
* Copyright (c) Toradex
|
||||
*
|
||||
* Enable Bridge Tied Load (BTL) speaker mode on the Verdin Development Board,
|
||||
* combining the two loudspeaker outputs for higher output power.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
&nau8822_1a {
|
||||
nuvoton,spk-btl;
|
||||
};
|
||||
94
arch/arm64/boot/dts/ti/k3-am625-verdin-dsi-to-hdmi.dtso
Normal file
94
arch/arm64/boot/dts/ti/k3-am625-verdin-dsi-to-hdmi.dtso
Normal file
|
|
@ -0,0 +1,94 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
/*
|
||||
* Copyright (c) Toradex
|
||||
*
|
||||
* Toradex DSI to HDMI Adapter on Verdin DSI_1
|
||||
*
|
||||
* https://developer.toradex.com/hardware/accessories/add-ons/dsi-hdmi-adapter
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
&{/} {
|
||||
hdmi-connector {
|
||||
compatible = "hdmi-connector";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm3_dsi_gpio>;
|
||||
ddc-i2c-bus = <&main_i2c2>;
|
||||
/* Verdin PWM_3_DSI (SODIMM 19) */
|
||||
hpd-gpios = <&main_gpio1 17 GPIO_ACTIVE_HIGH>;
|
||||
type = "a";
|
||||
|
||||
port {
|
||||
hdmi_connector_in: endpoint {
|
||||
remote-endpoint = <&dsi_hdmi_bridge_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&dsi_bridge {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dsi_bridge_ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
|
||||
dsi_bridge_out: endpoint {
|
||||
remote-endpoint = <&dsi_hdmi_bridge_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&dss {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin PWM_3_DSI (SODIMM 19) repurposed as HDMI HPD GPIO */
|
||||
&epwm1 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/* Verdin I2C_1 */
|
||||
&main_i2c1 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
hdmi@48 {
|
||||
compatible = "lontium,lt8912b";
|
||||
reg = <0x48>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_dsi1_bkl_en>;
|
||||
/* Verdin GPIO_10_DSI (SODIMM 21) */
|
||||
reset-gpios = <&main_gpio0 30 GPIO_ACTIVE_LOW>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
|
||||
dsi_hdmi_bridge_in: endpoint {
|
||||
data-lanes = <1 2 3 4>;
|
||||
remote-endpoint = <&dsi_bridge_out>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
|
||||
dsi_hdmi_bridge_out: endpoint {
|
||||
remote-endpoint = <&hdmi_connector_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,124 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
/*
|
||||
* Copyright (c) Toradex
|
||||
*
|
||||
* Toradex DSI to LVDS Adapter on Verdin DSI_1 with Capacitive Touch Display 10.1"
|
||||
* Used on Dahlia (X17) and Development Board (X48) that expose DSI_1 via an
|
||||
* Samtec LSS-130 connector.
|
||||
*
|
||||
* https://developer.toradex.com/hardware/accessories/displays/capacitive-touch-display-101inch-lvds
|
||||
* https://www.toradex.com/accessories/capacitive-touch-display-10.1-inch-lvds
|
||||
* https://developer.toradex.com/hardware/accessories/add-ons/dsi-lvds-adapter
|
||||
* https://www.toradex.com/accessories/verdin-dsi-to-lvds-adapter
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/pwm/pwm.h>
|
||||
|
||||
&{/} {
|
||||
backlight_pwm3: backlight-pwm3 {
|
||||
compatible = "pwm-backlight";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2s_2_d_out_gpio>;
|
||||
brightness-levels = <0 45 63 88 119 158 203 255>;
|
||||
default-brightness-level = <4>;
|
||||
/* Verdin I2S_2_D_OUT as GPIO (SODIMM 46) */
|
||||
enable-gpios = <&main_gpio0 34 GPIO_ACTIVE_HIGH>;
|
||||
power-supply = <®_3v3>;
|
||||
/* Verdin PWM_3_DSI (SODIMM 19) */
|
||||
pwms = <&epwm1 0 6666667 PWM_POLARITY_INVERTED>;
|
||||
};
|
||||
|
||||
panel-lvds-bridge {
|
||||
compatible = "logictechno,lt170410-2whc";
|
||||
backlight = <&backlight_pwm3>;
|
||||
power-supply = <®_3v3_dsi>;
|
||||
|
||||
port {
|
||||
panel_lvds_bridge_in: endpoint {
|
||||
remote-endpoint = <&dsi_lvds_bridge_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
reg_3v3_dsi: regulator-3v3-dsi {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-name = "+V3.3_DSI";
|
||||
};
|
||||
};
|
||||
|
||||
&dsi_bridge {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dsi_bridge_ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
|
||||
dsi_bridge_out: endpoint {
|
||||
remote-endpoint = <&dsi_lvds_bridge_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&dss {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin I2C_1 */
|
||||
&main_i2c1 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
bridge@2c {
|
||||
compatible = "ti,sn65dsi84";
|
||||
reg = <0x2c>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_dsi1_bkl_en>;
|
||||
/* Verdin GPIO_10_DSI (SODIMM 21) - DSI_1_BKL_EN */
|
||||
enable-gpios = <&main_gpio0 30 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
|
||||
dsi_lvds_bridge_in: endpoint {
|
||||
remote-endpoint = <&dsi_bridge_out>;
|
||||
data-lanes = <1 2 3 4>;
|
||||
};
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
|
||||
dsi_lvds_bridge_out: endpoint {
|
||||
remote-endpoint = <&panel_lvds_bridge_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
touchscreen@4a {
|
||||
compatible = "atmel,maxtouch";
|
||||
reg = <0x4a>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_dsi1_int>, <&pinctrl_i2s_2_bclk_gpio>;
|
||||
/* Verdin GPIO_9_DSI (SODIMM 17) - TOUCH_INT# */
|
||||
interrupt-parent = <&main_gpio1>;
|
||||
interrupts = <49 IRQ_TYPE_EDGE_FALLING>;
|
||||
/* Verdin I2S_2_BCLK (SODIMM 42) - TOUCH_RESET# */
|
||||
reset-gpios = <&main_gpio0 35 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
17
arch/arm64/boot/dts/ti/k3-am625-verdin-ov5640-24mhz.dtso
Normal file
17
arch/arm64/boot/dts/ti/k3-am625-verdin-ov5640-24mhz.dtso
Normal file
|
|
@ -0,0 +1,17 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
/*
|
||||
* Copyright (c) Toradex
|
||||
*
|
||||
* Toradex CSI Camera Module 5MP OV5640 on Verdin CSI_1.
|
||||
*
|
||||
* https://developer.toradex.com/hardware/legacy-products/other/csi-camera-module-5mp-ov5640/
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include "k3-am625-verdin-ov5640.dtsi"
|
||||
|
||||
&clk_ov5640_osc {
|
||||
clock-frequency = <24000000>;
|
||||
};
|
||||
71
arch/arm64/boot/dts/ti/k3-am625-verdin-ov5640.dtsi
Normal file
71
arch/arm64/boot/dts/ti/k3-am625-verdin-ov5640.dtsi
Normal file
|
|
@ -0,0 +1,71 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
/*
|
||||
* Copyright (c) Toradex
|
||||
*
|
||||
* Common device tree include for Toradex OV5640 CSI camera on Verdin CSI_1.
|
||||
*/
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
&{/} {
|
||||
clk_ov5640_osc: ov5640-xclk {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
};
|
||||
|
||||
regulator_camera: regulator-camera {
|
||||
compatible = "regulator-fixed";
|
||||
/* Verdin GPIO_8_CSI (SODIMM 222) - CAM_1_CON_PWRCTRL */
|
||||
gpio = <&main_gpio0 42 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
regulator-name = "V_CSI";
|
||||
startup-delay-us = <5000>;
|
||||
};
|
||||
};
|
||||
|
||||
&csi0_port0 {
|
||||
status = "okay";
|
||||
|
||||
csi2rx0_in_sensor: endpoint {
|
||||
remote-endpoint = <&csi2_cam0>;
|
||||
bus-type = <4>; /* CSI2 DPHY */
|
||||
clock-lanes = <0>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
|
||||
&dphy0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&main_i2c3 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
camera@3c {
|
||||
compatible = "ovti,ov5640";
|
||||
reg = <0x3c>;
|
||||
|
||||
clocks = <&clk_ov5640_osc>;
|
||||
clock-names = "xclk";
|
||||
AVDD-supply = <®ulator_camera>;
|
||||
DOVDD-supply = <®ulator_camera>;
|
||||
DVDD-supply = <®ulator_camera>;
|
||||
/* Verdin GPIO_6 (SODIMM 218) - CAM_1_CON_PWRDWN */
|
||||
powerdown-gpios = <&main_gpio0 36 GPIO_ACTIVE_HIGH>;
|
||||
/* Verdin GPIO_5 (SODIMM 216) - CAM_1_CON_RST */
|
||||
reset-gpios = <&main_gpio0 40 GPIO_ACTIVE_LOW>;
|
||||
|
||||
port {
|
||||
csi2_cam0: endpoint {
|
||||
remote-endpoint = <&csi2rx0_in_sensor>;
|
||||
clock-lanes = <0>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&ti_csi2rx0 {
|
||||
status = "okay";
|
||||
};
|
||||
18
arch/arm64/boot/dts/ti/k3-am625-verdin-ov5640.dtso
Normal file
18
arch/arm64/boot/dts/ti/k3-am625-verdin-ov5640.dtso
Normal file
|
|
@ -0,0 +1,18 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
/*
|
||||
* Copyright (c) Toradex
|
||||
*
|
||||
* Toradex CSI Camera Set 5MP OV5640 on Verdin CSI_1.
|
||||
*
|
||||
* https://developer.toradex.com/hardware/accessories/cameras/csi-camera-module-5mp-ov5640-arducam
|
||||
* https://www.toradex.com/accessories/csi-camera-ov5640
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include "k3-am625-verdin-ov5640.dtsi"
|
||||
|
||||
&clk_ov5640_osc {
|
||||
clock-frequency = <27000000>;
|
||||
};
|
||||
|
|
@ -0,0 +1,132 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
/*
|
||||
* Copyright (c) Toradex
|
||||
*
|
||||
* Toradex Capacitive Touch Display 10.1" on Verdin DSI_1.
|
||||
* On Dahlia (X17) and Development Board (X48), DSI_1 is exposed via a
|
||||
* Samtec LSS-130 connector and requires the Toradex DSI Display Adapter
|
||||
* to convert to FFC/FPC connector.
|
||||
*
|
||||
* https://developer.toradex.com/hardware/accessories/displays/capacitive-touch-display-101inch-dsi
|
||||
* https://www.toradex.com/accessories/capacitive-touch-display-10.1-inch-dsi
|
||||
* https://developer.toradex.com/hardware/accessories/add-ons/dsi-display-adapter
|
||||
* https://www.toradex.com/accessories/verdin-dsi-display-adapter
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/pwm/pwm.h>
|
||||
|
||||
&{/} {
|
||||
backlight_pwm3: backlight-pwm3 {
|
||||
compatible = "pwm-backlight";
|
||||
brightness-levels = <0 45 63 88 119 158 203 255>;
|
||||
default-brightness-level = <4>;
|
||||
power-supply = <®_3v3>;
|
||||
/* Verdin PWM_3_DSI (SODIMM 19) - PWM_3_DSI_LVDS */
|
||||
pwms = <&epwm1 0 6666667 0>;
|
||||
};
|
||||
|
||||
panel-lvds-bridge {
|
||||
compatible = "riverdi,rvt101hvlnwc00", "panel-lvds";
|
||||
backlight = <&backlight_pwm3>;
|
||||
data-mapping = "vesa-24";
|
||||
height-mm = <136>;
|
||||
width-mm = <217>;
|
||||
|
||||
panel-timing {
|
||||
clock-frequency = <72400000>;
|
||||
de-active = <1>;
|
||||
hactive = <1280>;
|
||||
hback-porch = <88 88 88>;
|
||||
hfront-porch = <12 72 132>;
|
||||
hsync-active = <0>;
|
||||
hsync-len = <1 5 40>;
|
||||
pixelclk-active = <1>;
|
||||
vactive = <800>;
|
||||
vback-porch = <23 23 23>;
|
||||
vfront-porch = <1 15 49>;
|
||||
vsync-active = <0>;
|
||||
vsync-len = <1 10 20>;
|
||||
};
|
||||
|
||||
port {
|
||||
panel_lvds_bridge_in: endpoint {
|
||||
remote-endpoint = <&dsi_lvds_bridge_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&dsi_bridge {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dsi_bridge_ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
|
||||
dsi_bridge_out: endpoint {
|
||||
remote-endpoint = <&dsi_lvds_bridge_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&dss {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin I2C_2_DSI */
|
||||
&main_i2c2 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
bridge@2c {
|
||||
compatible = "ti,sn65dsi83";
|
||||
reg = <0x2c>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_dsi1_bkl_en>;
|
||||
/* Verdin GPIO_10_DSI (SODIMM 21) - DSI_1_BKL_EN */
|
||||
enable-gpios = <&main_gpio0 30 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
|
||||
dsi_lvds_bridge_in: endpoint {
|
||||
remote-endpoint = <&dsi_bridge_out>;
|
||||
data-lanes = <1 2 3 4>;
|
||||
};
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
|
||||
dsi_lvds_bridge_out: endpoint {
|
||||
remote-endpoint = <&panel_lvds_bridge_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
touchscreen@41 {
|
||||
compatible = "ilitek,ili2132";
|
||||
reg = <0x41>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_dsi1_int>, <&pinctrl_i2s_2_bclk_gpio>;
|
||||
/* Verdin GPIO_9_DSI (SODIMM 17) - TOUCH_INT# */
|
||||
interrupt-parent = <&main_gpio1>;
|
||||
interrupts = <49 IRQ_TYPE_EDGE_RISING>;
|
||||
/* Verdin I2S_2_BCLK (SODIMM 42) - TOUCH_RESET# */
|
||||
reset-gpios = <&main_gpio0 35 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,120 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
/*
|
||||
* Copyright (c) Toradex
|
||||
*
|
||||
* Toradex Capacitive Touch Display 10.1" connected via Verdin AM62 OLDI
|
||||
* on carrier boards with a Toradex standard LVDS display connector
|
||||
* (e.g., Mallow).
|
||||
*
|
||||
* https://developer.toradex.com/hardware/accessories/displays/capacitive-touch-display-101inch-lvds
|
||||
* https://www.toradex.com/accessories/capacitive-touch-display-10.1-inch-lvds
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/pwm/pwm.h>
|
||||
#include "k3-pinctrl.h"
|
||||
|
||||
&{/} {
|
||||
backlight_pwm2: backlight-pwm2 {
|
||||
compatible = "pwm-backlight";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2s_2_d_out_gpio>;
|
||||
brightness-levels = <0 45 63 88 119 158 203 255>;
|
||||
default-brightness-level = <4>;
|
||||
/* Verdin I2S_2_D_OUT as GPIO (SODIMM 46) */
|
||||
enable-gpios = <&main_gpio0 34 GPIO_ACTIVE_HIGH>;
|
||||
/* Verdin PWM_2 (SODIMM 16) */
|
||||
pwms = <&epwm0 1 6666667 PWM_POLARITY_INVERTED>;
|
||||
};
|
||||
|
||||
panel-lvds-native {
|
||||
compatible = "logictechno,lt170410-2whc";
|
||||
backlight = <&backlight_pwm2>;
|
||||
power-supply = <®_3v3_lvds>;
|
||||
|
||||
port {
|
||||
panel_lvds_native_in: endpoint {
|
||||
remote-endpoint = <&oldi0_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
reg_3v3_lvds: regulator-3v3-lvds {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-name = "+V3.3_LVDS";
|
||||
};
|
||||
};
|
||||
|
||||
&dss {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dss_ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
/* DSS VP1: internal DPI output to OLDIx */
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
|
||||
dss0_out: endpoint {
|
||||
remote-endpoint = <&oldi0_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* Verdin I2C_2_DSI */
|
||||
&main_i2c2 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
touchscreen@4a {
|
||||
compatible = "atmel,maxtouch";
|
||||
reg = <0x4a>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2s_2_d_in_gpio>, <&pinctrl_i2s_2_sync_gpio>;
|
||||
/* Verdin I2S_2_SYNC as GPIO (SODIMM 44) */
|
||||
interrupt-parent = <&main_gpio0>;
|
||||
interrupts = <37 IRQ_TYPE_EDGE_FALLING>;
|
||||
/* Verdin I2S_2_D_IN as GPIO (SODIMM 48) */
|
||||
reset-gpios = <&main_gpio0 33 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
&main_pmx0 {
|
||||
/* Mallow Touch RST */
|
||||
pinctrl_i2s_2_d_in_gpio: main-gpio0-33-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x0088, PIN_INPUT, 7) /* (L24) GPMC0_OEn_REn.GPIO0_33 */ /* SODIMM 48 */
|
||||
>;
|
||||
};
|
||||
|
||||
/* Mallow Touch INT# */
|
||||
pinctrl_i2s_2_sync_gpio: main-gpio0-37-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x0098, PIN_INPUT, 7) /* (U23) GPMC0_WAIT0.GPIO0_37 */ /* SODIMM 44 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&oldi0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&oldi0_port0 {
|
||||
oldi0_in: endpoint {
|
||||
remote-endpoint = <&dss0_out>;
|
||||
};
|
||||
};
|
||||
|
||||
&oldi0_port1 {
|
||||
oldi0_out: endpoint {
|
||||
remote-endpoint = <&panel_lvds_native_in>;
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,132 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
/*
|
||||
* Copyright (c) Toradex
|
||||
*
|
||||
* Toradex Capacitive Touch Display 7" on Verdin DSI_1.
|
||||
* On Dahlia (X17) and Development Board (X48), DSI_1 is exposed via a
|
||||
* Samtec LSS-130 connector and requires the Toradex DSI Display Adapter
|
||||
* to convert to FFC/FPC connector.
|
||||
*
|
||||
* https://developer.toradex.com/hardware/accessories/displays/capacitive-touch-display-7inch-dsi
|
||||
* https://www.toradex.com/accessories/capacitive-touch-display-7-inch-dsi
|
||||
* https://developer.toradex.com/hardware/accessories/add-ons/dsi-display-adapter
|
||||
* https://www.toradex.com/accessories/verdin-dsi-display-adapter
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/pwm/pwm.h>
|
||||
|
||||
&{/} {
|
||||
backlight_pwm3: backlight-pwm3 {
|
||||
compatible = "pwm-backlight";
|
||||
brightness-levels = <0 45 63 88 119 158 203 255>;
|
||||
default-brightness-level = <4>;
|
||||
power-supply = <®_3v3>;
|
||||
/* Verdin PWM_3_DSI (SODIMM 19) - PWM_3_DSI_LVDS */
|
||||
pwms = <&epwm1 0 6666667 0>;
|
||||
};
|
||||
|
||||
panel-lvds-bridge {
|
||||
compatible = "riverdi,rvt70hslnwca0", "panel-lvds";
|
||||
backlight = <&backlight_pwm3>;
|
||||
data-mapping = "vesa-24";
|
||||
height-mm = <86>;
|
||||
width-mm = <154>;
|
||||
|
||||
panel-timing {
|
||||
clock-frequency = <51200000>;
|
||||
de-active = <1>;
|
||||
hactive = <1024>;
|
||||
hback-porch = <160 160 160>;
|
||||
hfront-porch = <16 160 216>;
|
||||
hsync-active = <0>;
|
||||
hsync-len = <1 5 140>;
|
||||
pixelclk-active = <1>;
|
||||
vactive = <600>;
|
||||
vback-porch = <23 23 23>;
|
||||
vfront-porch = <1 12 126>;
|
||||
vsync-active = <0>;
|
||||
vsync-len = <1 10 20>;
|
||||
};
|
||||
|
||||
port {
|
||||
panel_lvds_bridge_in: endpoint {
|
||||
remote-endpoint = <&dsi_lvds_bridge_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&dsi_bridge {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dsi_bridge_ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
|
||||
dsi_bridge_out: endpoint {
|
||||
remote-endpoint = <&dsi_lvds_bridge_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&dss {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Verdin I2C_2_DSI */
|
||||
&main_i2c2 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
bridge@2c {
|
||||
compatible = "ti,sn65dsi83";
|
||||
reg = <0x2c>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_dsi1_bkl_en>;
|
||||
/* Verdin GPIO_10_DSI (SODIMM 21) - DSI_1_BKL_EN */
|
||||
enable-gpios = <&main_gpio0 30 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
|
||||
dsi_lvds_bridge_in: endpoint {
|
||||
remote-endpoint = <&dsi_bridge_out>;
|
||||
data-lanes = <1 2 3 4>;
|
||||
};
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
|
||||
dsi_lvds_bridge_out: endpoint {
|
||||
remote-endpoint = <&panel_lvds_bridge_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
touchscreen@41 {
|
||||
compatible = "ilitek,ili2132";
|
||||
reg = <0x41>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_dsi1_int>, <&pinctrl_i2s_2_bclk_gpio>;
|
||||
/* Verdin GPIO_9_DSI (SODIMM 17) - TOUCH_INT# */
|
||||
interrupt-parent = <&main_gpio1>;
|
||||
interrupts = <49 IRQ_TYPE_EDGE_RISING>;
|
||||
/* Verdin I2S_2_BCLK (SODIMM 42) - TOUCH_RESET# */
|
||||
reset-gpios = <&main_gpio0 35 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
13
arch/arm64/boot/dts/ti/k3-am625-verdin-uart4-mcu.dtso
Normal file
13
arch/arm64/boot/dts/ti/k3-am625-verdin-uart4-mcu.dtso
Normal file
|
|
@ -0,0 +1,13 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
/*
|
||||
* Copyright (c) Toradex
|
||||
*
|
||||
* Verdin AM62 Cortex-M4F debug UART
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
&mcu_uart0 {
|
||||
status = "reserved";
|
||||
};
|
||||
|
|
@ -154,6 +154,7 @@ vddshv_sdio: regulator-5 {
|
|||
gpios = <&main_gpio0 31 GPIO_ACTIVE_HIGH>;
|
||||
states = <1800000 0x0>,
|
||||
<3300000 0x1>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
leds {
|
||||
|
|
@ -407,6 +408,7 @@ vddshv_sdio_pins_default: vddshv-sdio-default-pins {
|
|||
pinctrl-single,pins = <
|
||||
AM62AX_IOPAD(0x07c, PIN_OUTPUT, 7) /* (N22) GPMC0_CLK.GPIO0_31 */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
main_ecap0_pins_default: main-ecap0-default-pins {
|
||||
|
|
|
|||
|
|
@ -250,6 +250,7 @@ buckb1: buck1 {
|
|||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
bootph-pre-ram;
|
||||
};
|
||||
|
||||
buckb2: buck2 {
|
||||
|
|
|
|||
|
|
@ -18,7 +18,7 @@ serdes_refclk: clk-0 {
|
|||
|
||||
&cbass_main {
|
||||
serdes_wiz0: phy@f000000 {
|
||||
compatible = "ti,am64-wiz-10g";
|
||||
compatible = "ti,j722s-wiz-10g", "ti,am64-wiz-10g";
|
||||
ranges = <0x0f000000 0x0 0x0f000000 0x00010000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
|
@ -56,7 +56,7 @@ serdes0: serdes@f000000 {
|
|||
};
|
||||
|
||||
serdes_wiz1: phy@f010000 {
|
||||
compatible = "ti,am64-wiz-10g";
|
||||
compatible = "ti,j722s-wiz-10g", "ti,am64-wiz-10g";
|
||||
ranges = <0x0f010000 0x0 0x0f010000 0x00010000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
|
@ -430,19 +430,6 @@ &main_bcdma_csi {
|
|||
ti,sci-rm-range-tchan = <0x22>;
|
||||
};
|
||||
|
||||
/* MCU domain overrides */
|
||||
|
||||
&mcu_r5fss0_core0 {
|
||||
firmware-name = "j722s-mcu-r5f0_0-fw";
|
||||
};
|
||||
|
||||
/* Wakeup domain overrides */
|
||||
|
||||
&wkup_r5fss0_core0 {
|
||||
firmware-name = "j722s-wkup-r5f0_0-fw";
|
||||
};
|
||||
|
||||
/* MAIN domain overrides */
|
||||
&hsm {
|
||||
firmware-name = "j722s-hsm-m4f-fw";
|
||||
};
|
||||
|
|
@ -457,11 +444,12 @@ serdes_ln_ctrl: mux-controller@4080 {
|
|||
};
|
||||
};
|
||||
|
||||
&wkup_conf {
|
||||
pcie0_ctrl: pcie0-ctrl@4070 {
|
||||
compatible = "ti,j784s4-pcie-ctrl", "syscon";
|
||||
reg = <0x4070 0x4>;
|
||||
};
|
||||
&cpsw3g {
|
||||
compatible = "ti,j722s-cpsw-nuss", "ti,am642-cpsw-nuss";
|
||||
};
|
||||
|
||||
&phy_gmii_sel {
|
||||
compatible = "ti,j722s-phy-gmii-sel", "ti,am654-phy-gmii-sel";
|
||||
};
|
||||
|
||||
&oc_sram {
|
||||
|
|
@ -473,6 +461,10 @@ &inta_main_dmss {
|
|||
ti,interrupt-ranges = <7 71 21>;
|
||||
};
|
||||
|
||||
&main_pmx0 {
|
||||
compatible = "ti,j7200-padconf", "pinctrl-single";
|
||||
};
|
||||
|
||||
&main_gpio0 {
|
||||
gpio-ranges = <&main_pmx0 0 0 32>, <&main_pmx0 32 33 38>,
|
||||
<&main_pmx0 70 72 17>;
|
||||
|
|
|
|||
15
arch/arm64/boot/dts/ti/k3-j722s-mcu.dtsi
Normal file
15
arch/arm64/boot/dts/ti/k3-j722s-mcu.dtsi
Normal file
|
|
@ -0,0 +1,15 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-only OR MIT
|
||||
/*
|
||||
* Device Tree file for the J722S MCU domain peripherals
|
||||
*
|
||||
* Copyright (C) 2026 Texas Instruments Incorporated - https://www.ti.com/
|
||||
* Copyright (C) 2026 Bootlin
|
||||
*/
|
||||
|
||||
&mcu_pmx0 {
|
||||
compatible = "ti,j7200-padconf", "pinctrl-single";
|
||||
};
|
||||
|
||||
&mcu_r5fss0_core0 {
|
||||
firmware-name = "j722s-mcu-r5f0_0-fw";
|
||||
};
|
||||
18
arch/arm64/boot/dts/ti/k3-j722s-wakeup.dtsi
Normal file
18
arch/arm64/boot/dts/ti/k3-j722s-wakeup.dtsi
Normal file
|
|
@ -0,0 +1,18 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-only OR MIT
|
||||
/*
|
||||
* Device Tree file for the J722S WAKEUP domain peripherals
|
||||
*
|
||||
* Copyright (C) 2026 Texas Instruments Incorporated - https://www.ti.com/
|
||||
* Copyright (C) 2026 Bootlin
|
||||
*/
|
||||
|
||||
&wkup_conf {
|
||||
pcie0_ctrl: pcie0-ctrl@4070 {
|
||||
compatible = "ti,j784s4-pcie-ctrl", "syscon";
|
||||
reg = <0x4070 0x4>;
|
||||
};
|
||||
};
|
||||
|
||||
&wkup_r5fss0_core0 {
|
||||
firmware-name = "j722s-wkup-r5f0_0-fw";
|
||||
};
|
||||
|
|
@ -238,3 +238,5 @@ cbass_wakeup: bus@b00000 {
|
|||
|
||||
/* Include J722S specific peripherals */
|
||||
#include "k3-j722s-main.dtsi"
|
||||
#include "k3-j722s-mcu.dtsi"
|
||||
#include "k3-j722s-wakeup.dtsi"
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user