From d8fe8442366ffd8306575028bda92389d0dfb674 Mon Sep 17 00:00:00 2001 From: Judith Mendez Date: Tue, 24 Mar 2026 09:02:47 -0500 Subject: [PATCH 01/20] arm64: dts: ti: k3-am62a7-sk: Add bootph-all tag to vqmmc Add bootph-all property to vqmmc voltage regulator node and its corresponding pinmux node to make it available during all boot phases. This allows to run tuning early in SPL stages of boot. Fixes: 8f023012eb4a ("arm64: dts: ti: k3-am62a: Enable UHS mode support for SD cards") Cc: stable@vger.kernel.org Signed-off-by: Judith Mendez Link: https://patch.msgid.link/20260324140247.1200631-1-jm@ti.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-am62a7-sk.dts | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts index c1e9067b3bdd..821a9705bb7d 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts @@ -154,6 +154,7 @@ vddshv_sdio: regulator-5 { gpios = <&main_gpio0 31 GPIO_ACTIVE_HIGH>; states = <1800000 0x0>, <3300000 0x1>; + bootph-all; }; leds { @@ -407,6 +408,7 @@ vddshv_sdio_pins_default: vddshv-sdio-default-pins { pinctrl-single,pins = < AM62AX_IOPAD(0x07c, PIN_OUTPUT, 7) /* (N22) GPMC0_CLK.GPIO0_31 */ >; + bootph-all; }; main_ecap0_pins_default: main-ecap0-default-pins { From abbc2a8235944a78f0a0003fb95cdf6ec5a150a1 Mon Sep 17 00:00:00 2001 From: Akashdeep Kaur Date: Wed, 1 Apr 2026 16:52:56 +0530 Subject: [PATCH 02/20] arm64: dts: ti: k3-am62-lp-sk: Add system-power-controller On AM62-LP-SK, the TPS65219 PMIC is the system power controller responsible for handling system poweroff. Add the "system-power-controller" property to the PMIC node to explicitly designate it as such. Among all in-tree device trees using the TPS65219 PMIC (verified via compatible string), AM62-LP-SK was the only one missing this property. This patch corrects that omission. This property will be used by the PMIC driver to conditionally register the poweroff handler, ensuring only the designated power controller registers for system poweroff operations. Signed-off-by: Akashdeep Kaur Link: https://patch.msgid.link/20260401112257.1248437-2-a-kaur@ti.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts b/arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts index 8a556fbbe08b..dfd65c00f5b9 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts @@ -206,6 +206,7 @@ tps65219: pmic@30 { interrupt-parent = <&gic500>; interrupts = ; + system-power-controller; regulators { buck1_reg: buck1 { From 92468e053476537250e750ecc9bc648b0b1aef09 Mon Sep 17 00:00:00 2001 From: Abhash Kumar Jha Date: Mon, 27 Apr 2026 16:28:59 +0200 Subject: [PATCH 03/20] arm64: dts: ti: k3-j722s: Use ti,j7200-padconf compatible The pinctrl contexts for j722s should be saved and restored during suspend-to-ram, just like it is done for j7200 and j784s4 SoCs. Use ti,j7200-padconf compatible to save and restore pinctrl contexts during suspend-to-ram. Signed-off-by: Abhash Kumar Jha Signed-off-by: Richard Genoud (TI) Link: https://patch.msgid.link/20260427142901.341861-2-richard.genoud@bootlin.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-j722s-main.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi index ddf20e44f0ea..d14caa9d8619 100644 --- a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi @@ -432,6 +432,10 @@ &main_bcdma_csi { /* MCU domain overrides */ +&mcu_pmx0 { + compatible = "ti,j7200-padconf", "pinctrl-single"; +}; + &mcu_r5fss0_core0 { firmware-name = "j722s-mcu-r5f0_0-fw"; }; @@ -473,6 +477,10 @@ &inta_main_dmss { ti,interrupt-ranges = <7 71 21>; }; +&main_pmx0 { + compatible = "ti,j7200-padconf", "pinctrl-single"; +}; + &main_gpio0 { gpio-ranges = <&main_pmx0 0 0 32>, <&main_pmx0 32 33 38>, <&main_pmx0 70 72 17>; From e6856de612ca8941b7435c91a0f2e770d1a981e0 Mon Sep 17 00:00:00 2001 From: "Richard Genoud (TI)" Date: Mon, 27 Apr 2026 16:29:00 +0200 Subject: [PATCH 04/20] arm64: dts: ti: k3-j722s: Add mcu domain peripherals specific to J722S Introduce the "k3-j722s-mcu.dtsi" file to contain mcu domain peripherals that are specific to J722S SoC and are not shared with AM62P. Previously, those nodes were squatting the k3-j722s-main.dtsi file which should contain only main domain peripherals. Signed-off-by: Richard Genoud (TI) Link: https://patch.msgid.link/20260427142901.341861-3-richard.genoud@bootlin.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-j722s-main.dtsi | 10 ---------- arch/arm64/boot/dts/ti/k3-j722s-mcu.dtsi | 15 +++++++++++++++ arch/arm64/boot/dts/ti/k3-j722s.dtsi | 1 + 3 files changed, 16 insertions(+), 10 deletions(-) create mode 100644 arch/arm64/boot/dts/ti/k3-j722s-mcu.dtsi diff --git a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi index d14caa9d8619..2a8aba13bd73 100644 --- a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi @@ -430,16 +430,6 @@ &main_bcdma_csi { ti,sci-rm-range-tchan = <0x22>; }; -/* MCU domain overrides */ - -&mcu_pmx0 { - compatible = "ti,j7200-padconf", "pinctrl-single"; -}; - -&mcu_r5fss0_core0 { - firmware-name = "j722s-mcu-r5f0_0-fw"; -}; - /* Wakeup domain overrides */ &wkup_r5fss0_core0 { diff --git a/arch/arm64/boot/dts/ti/k3-j722s-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-j722s-mcu.dtsi new file mode 100644 index 000000000000..ab43a7e49f37 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-j722s-mcu.dtsi @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT +/* + * Device Tree file for the J722S MCU domain peripherals + * + * Copyright (C) 2026 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (C) 2026 Bootlin + */ + +&mcu_pmx0 { + compatible = "ti,j7200-padconf", "pinctrl-single"; +}; + +&mcu_r5fss0_core0 { + firmware-name = "j722s-mcu-r5f0_0-fw"; +}; diff --git a/arch/arm64/boot/dts/ti/k3-j722s.dtsi b/arch/arm64/boot/dts/ti/k3-j722s.dtsi index 1b36dcf37925..ad477dd66963 100644 --- a/arch/arm64/boot/dts/ti/k3-j722s.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j722s.dtsi @@ -238,3 +238,4 @@ cbass_wakeup: bus@b00000 { /* Include J722S specific peripherals */ #include "k3-j722s-main.dtsi" +#include "k3-j722s-mcu.dtsi" From 6c21336acd5b2adf33ec73f43f31bd389381da5f Mon Sep 17 00:00:00 2001 From: "Richard Genoud (TI)" Date: Mon, 27 Apr 2026 16:29:01 +0200 Subject: [PATCH 05/20] arm64: dts: ti: k3-j722s: Add wakeup domain peripherals specific to J722S Introduce the "k3-j722s-mcu.dtsi" file to contain wakeup domain peripherals that are specific to J722S SoC and are not shared with AM62P. Previously, those nodes were squatting the k3-j722s-main.dtsi file which should contain only main domain peripherals. Signed-off-by: Richard Genoud (TI) Link: https://patch.msgid.link/20260427142901.341861-4-richard.genoud@bootlin.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-j722s-main.dtsi | 14 -------------- arch/arm64/boot/dts/ti/k3-j722s-wakeup.dtsi | 18 ++++++++++++++++++ arch/arm64/boot/dts/ti/k3-j722s.dtsi | 1 + 3 files changed, 19 insertions(+), 14 deletions(-) create mode 100644 arch/arm64/boot/dts/ti/k3-j722s-wakeup.dtsi diff --git a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi index 2a8aba13bd73..d1dbf1e24fbf 100644 --- a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi @@ -430,13 +430,6 @@ &main_bcdma_csi { ti,sci-rm-range-tchan = <0x22>; }; -/* Wakeup domain overrides */ - -&wkup_r5fss0_core0 { - firmware-name = "j722s-wkup-r5f0_0-fw"; -}; - -/* MAIN domain overrides */ &hsm { firmware-name = "j722s-hsm-m4f-fw"; }; @@ -451,13 +444,6 @@ serdes_ln_ctrl: mux-controller@4080 { }; }; -&wkup_conf { - pcie0_ctrl: pcie0-ctrl@4070 { - compatible = "ti,j784s4-pcie-ctrl", "syscon"; - reg = <0x4070 0x4>; - }; -}; - &oc_sram { reg = <0x00 0x70000000 0x00 0x40000>; ranges = <0x00 0x00 0x70000000 0x40000>; diff --git a/arch/arm64/boot/dts/ti/k3-j722s-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j722s-wakeup.dtsi new file mode 100644 index 000000000000..1297813f4829 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-j722s-wakeup.dtsi @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT +/* + * Device Tree file for the J722S WAKEUP domain peripherals + * + * Copyright (C) 2026 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (C) 2026 Bootlin + */ + +&wkup_conf { + pcie0_ctrl: pcie0-ctrl@4070 { + compatible = "ti,j784s4-pcie-ctrl", "syscon"; + reg = <0x4070 0x4>; + }; +}; + +&wkup_r5fss0_core0 { + firmware-name = "j722s-wkup-r5f0_0-fw"; +}; diff --git a/arch/arm64/boot/dts/ti/k3-j722s.dtsi b/arch/arm64/boot/dts/ti/k3-j722s.dtsi index ad477dd66963..ca10c6904b69 100644 --- a/arch/arm64/boot/dts/ti/k3-j722s.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j722s.dtsi @@ -239,3 +239,4 @@ cbass_wakeup: bus@b00000 { /* Include J722S specific peripherals */ #include "k3-j722s-main.dtsi" #include "k3-j722s-mcu.dtsi" +#include "k3-j722s-wakeup.dtsi" From bd9fbe2781993259ea9241be7452e1355ceffb87 Mon Sep 17 00:00:00 2001 From: "Thomas Richard (TI)" Date: Wed, 29 Apr 2026 14:19:48 +0200 Subject: [PATCH 06/20] arm64: dts: ti: k3-j721s2-som-p0: add bootph-pre-ram property to PMIC-B On j721s2, PMIC-B is needed to exit the DDR from retention after suspend-to-ram. Add bootph-pre-ram property to make PMIC-B available to the bootloader in the phase that sets up the DDR. Signed-off-by: Thomas Richard (TI) Reviewed-by: Udit Kumar Link: https://patch.msgid.link/20260429-k3-j721s2-som-bootph-pre-ram-pmic-4c-v2-1-31a0e7677216@bootlin.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi index 12a38dd1514b..a19e535f4946 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi @@ -250,6 +250,7 @@ buckb1: buck1 { regulator-max-microvolt = <1800000>; regulator-always-on; regulator-boot-on; + bootph-pre-ram; }; buckb2: buck2 { From 79c18f417a18c3211d815d6ec5b3239d74d951ea Mon Sep 17 00:00:00 2001 From: Wadim Egorov Date: Thu, 30 Apr 2026 15:01:15 +0200 Subject: [PATCH 07/20] arm64: dts: ti: am62-phyboard-lyra: Add DT overlay for Lincoln LCD185-101CT panel The panel is a Lincoln Technology Solutions LCD185-101CT [0]. It is a dual-link LVDS panel and supports WUXGA resolution (1920x1200). Furthermore, it has an I2C based touch controller: Goodix-GT928. Add an device tree overlay to support the Lincoln LCD185-101CT panel in combination with the phyBOARD-Lyra-AM62x. [0] https://lincolntechsolutions.com/wp-content/uploads/2024/09/LCD185-101CTL1ARNTT_DS_R1.3.pdf Signed-off-by: Wadim Egorov Link: https://patch.msgid.link/20260430130115.2380887-1-w.egorov@phytec.de Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/Makefile | 4 + .../ti/k3-am62-phyboard-lyra-oldi-lcd185.dtso | 185 ++++++++++++++++++ 2 files changed, 189 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am62-phyboard-lyra-oldi-lcd185.dtso diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index 5269c9619b65..6aaa4a2a7561 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -29,6 +29,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-zinnia.dtb dtb-$(CONFIG_ARCH_K3) += k3-am62x-phyboard-lyra-gpio-fan.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am62-lp-sk.dtb dtb-$(CONFIG_ARCH_K3) += k3-am62-lp-sk-nand.dtbo +dtb-$(CONFIG_ARCH_K3) += k3-am62-phyboard-lyra-oldi-lcd185.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am62-pocketbeagle2.dtb dtb-$(CONFIG_ARCH_K3) += k3-am6254atl-sk.dtb @@ -183,6 +184,8 @@ k3-am625-phyboard-lyra-disable-spi-nor-dtbs := k3-am625-phyboard-lyra-rdk.dtb \ k3-am6xx-phycore-disable-spi-nor.dtbo k3-am625-phyboard-lyra-gpio-fan-dtbs := k3-am625-phyboard-lyra-rdk.dtb \ k3-am62x-phyboard-lyra-gpio-fan.dtbo +k3-am625-phyboard-lyra-oldi-lcd185-dtbs := k3-am625-phyboard-lyra-rdk.dtb \ + k3-am62-phyboard-lyra-oldi-lcd185.dtbo k3-am625-phyboard-lyra-qspi-nor-dtbs := k3-am625-phyboard-lyra-rdk.dtb \ k3-am6xx-phycore-qspi-nor.dtbo k3-am625-sk-csi2-imx219-dtbs := k3-am625-sk.dtb \ @@ -287,6 +290,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \ k3-am625-phyboard-lyra-disable-rtc.dtb \ k3-am625-phyboard-lyra-disable-spi-nor.dtb \ k3-am625-phyboard-lyra-gpio-fan.dtb \ + k3-am625-phyboard-lyra-oldi-lcd185.dtb \ k3-am625-phyboard-lyra-qspi-nor.dtb \ k3-am625-sk-csi2-imx219.dtb \ k3-am625-sk-csi2-ov5640.dtb \ diff --git a/arch/arm64/boot/dts/ti/k3-am62-phyboard-lyra-oldi-lcd185.dtso b/arch/arm64/boot/dts/ti/k3-am62-phyboard-lyra-oldi-lcd185.dtso new file mode 100644 index 000000000000..d9f75ff28165 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am62-phyboard-lyra-oldi-lcd185.dtso @@ -0,0 +1,185 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT +/* + * Copyright (C) 2022-2026 PHYTEC Messtechnik GmbH + * Author: Wadim Egorov + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include +#include "k3-pinctrl.h" + +&{/} { + display { + compatible = "lincolntech,lcd185-101ct"; + backlight = <&backlight>; + power-supply = <&vdd_usb_5v0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dual-lvds-odd-pixels; + lcd_in0: endpoint { + remote-endpoint = <&oldi_0_out>; + }; + }; + + port@1 { + reg = <1>; + dual-lvds-even-pixels; + lcd_in1: endpoint { + remote-endpoint = <&oldi_1_out>; + }; + }; + }; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + brightness-levels = <0 4 8 16 32 64 128 255>; + default-brightness-level = <6>; + enable-gpios = <&gpio_exp 5 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&bl_pwm_pins_default>; + pwms = <&epwm0 1 50000 0>; + }; + + vdd_usb_5v0: regulator-vdd-usb5v0 { + compatible = "regulator-fixed"; + regulator-name = "vdd-usb5v0"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + regulator-boot-on; + }; +}; + +&dss { + pinctrl-names = "default"; + pinctrl-0 = <&main_oldi0_pins_default>, <&main_dss0_pins_default>; +}; + +&dss_ports { + #address-cells = <1>; + #size-cells = <0>; + + /* VP1: Output to OLDI */ + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + dpi0_out0: endpoint@0 { + reg = <0>; + remote-endpoint = <&oldi_0_in>; + }; + + dpi0_out1: endpoint@1 { + reg = <1>; + remote-endpoint = <&oldi_1_in>; + }; + }; +}; + +&epwm0 { + status = "okay"; +}; + +&main_i2c1 { + #address-cells = <1>; + #size-cells = <0>; + + touchscreen@5d { + compatible = "goodix,gt928"; + reg = <0x5d>; + + pinctrl-names = "default"; + pinctrl-0 = <&touch_screen_pins_default>; + + interrupt-parent = <&main_gpio0>; + interrupts = <19 IRQ_TYPE_LEVEL_LOW>; + + reset-gpios = <&main_gpio0 18 GPIO_ACTIVE_HIGH>; + irq-gpios = <&main_gpio0 19 GPIO_ACTIVE_HIGH>; + }; +}; + +&main_pmx0 { + bl_pwm_pins_default: bl-pwm-default-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x01b8, PIN_INPUT, 2) /* (C13) SPI0_CS1.EHRPWM0_B */ + >; + }; + + touch_screen_pins_default: touch-screen-default-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x048, PIN_OUTPUT, 7) /* (N25) GPMC0_AD3.GPIO0_18 - RST */ + AM62X_IOPAD(0x04c, PIN_INPUT, 7) /* (P24) GPMC0_AD4.GPIO0_19 - INT */ + >; + }; + + main_oldi0_pins_default: main-oldi0-default-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x0260, PIN_OUTPUT, 0) /* (AA5) OLDI0_A0N */ + AM62X_IOPAD(0x025c, PIN_OUTPUT, 0) /* (Y6) OLDI0_A0P */ + AM62X_IOPAD(0x0268, PIN_OUTPUT, 0) /* (AD3) OLDI0_A1N */ + AM62X_IOPAD(0x0264, PIN_OUTPUT, 0) /* (AB4) OLDI0_A1P */ + AM62X_IOPAD(0x0270, PIN_OUTPUT, 0) /* (Y8) OLDI0_A2N */ + AM62X_IOPAD(0x026c, PIN_OUTPUT, 0) /* (AA8) OLDI0_A2P */ + AM62X_IOPAD(0x0278, PIN_OUTPUT, 0) /* (AB6) OLDI0_A3N */ + AM62X_IOPAD(0x0274, PIN_OUTPUT, 0) /* (AA7) OLDI0_A3P */ + AM62X_IOPAD(0x0280, PIN_OUTPUT, 0) /* (AC6) OLDI0_A4N */ + AM62X_IOPAD(0x027c, PIN_OUTPUT, 0) /* (AC5) OLDI0_A4P */ + AM62X_IOPAD(0x0288, PIN_OUTPUT, 0) /* (AE5) OLDI0_A5N */ + AM62X_IOPAD(0x0284, PIN_OUTPUT, 0) /* (AD6) OLDI0_A5P */ + AM62X_IOPAD(0x0290, PIN_OUTPUT, 0) /* (AE6) OLDI0_A6N */ + AM62X_IOPAD(0x028c, PIN_OUTPUT, 0) /* (AD7) OLDI0_A6P */ + AM62X_IOPAD(0x0298, PIN_OUTPUT, 0) /* (AD8) OLDI0_A7N */ + AM62X_IOPAD(0x0294, PIN_OUTPUT, 0) /* (AE7) OLDI0_A7P */ + AM62X_IOPAD(0x02a0, PIN_OUTPUT, 0) /* (AD4) OLDI0_CLK0N */ + AM62X_IOPAD(0x029c, PIN_OUTPUT, 0) /* (AE3) OLDI0_CLK0P */ + AM62X_IOPAD(0x02a8, PIN_OUTPUT, 0) /* (AE4) OLDI0_CLK1N */ + AM62X_IOPAD(0x02a4, PIN_OUTPUT, 0) /* (AD5) OLDI0_CLK1P */ + >; + }; +}; + +&oldi0 { + ti,companion-oldi = <&oldi1>; + status = "okay"; +}; + +&oldi0_port0 { + oldi_0_in: endpoint { + remote-endpoint = <&dpi0_out0>; + }; +}; + +&oldi0_port1 { + oldi_0_out: endpoint { + remote-endpoint = <&lcd_in0>; + }; +}; + +&oldi1 { + ti,secondary-oldi; + status = "okay"; +}; + +&oldi1_port0 { + oldi_1_in: endpoint { + remote-endpoint = <&dpi0_out1>; + }; +}; + +&oldi1_port1 { + oldi_1_out: endpoint { + remote-endpoint = <&lcd_in1>; + }; +}; From d8961140aecdd68a57ac1ca11327964a709d5ae5 Mon Sep 17 00:00:00 2001 From: Nora Schiffer Date: Mon, 2 Mar 2026 11:14:58 +0100 Subject: [PATCH 08/20] dt-bindings: arm: ti: Add compatible for AM625-based TQMa62xx SOM family and carrier board The TQMa62xx is a SoM family with a pluggable connector. The MBa62xx is the matching reference/starterkit carrier board. Signed-off-by: Nora Schiffer Reviewed-by: Rob Herring (Arm) Link: https://patch.msgid.link/af87b54279e3d0b7dceccd2625f0ed7c5e06b83e.1772443991.git.nora.schiffer@ew.tq-group.com Signed-off-by: Nishanth Menon --- Documentation/devicetree/bindings/arm/ti/k3.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/ti/k3.yaml b/Documentation/devicetree/bindings/arm/ti/k3.yaml index 2a6a9441c23d..69b5441cbf1a 100644 --- a/Documentation/devicetree/bindings/arm/ti/k3.yaml +++ b/Documentation/devicetree/bindings/arm/ti/k3.yaml @@ -97,6 +97,13 @@ properties: - const: toradex,verdin-am62 # Verdin AM62 Module - const: ti,am625 + - description: K3 AM625 SoC on TQ-Systems TQMa62xx SoM + items: + - enum: + - tq,am625-tqma6254-mba62xx # MBa62xx base board + - const: tq,am625-tqma6254 + - const: ti,am625 + - description: K3 AM62P5 SoC Toradex Verdin Modules and Carrier Boards items: - enum: From 5b36d8c72c91d0f213c712472caf03192e373c0a Mon Sep 17 00:00:00 2001 From: Nora Schiffer Date: Mon, 2 Mar 2026 11:14:59 +0100 Subject: [PATCH 09/20] arm64: dts: ti: Add TQ-Systems TQMa62xx SoM and MBa62xx carrier board Device Trees The TQMa62xx is a SoM family with a pluggable board connector based on the TI AM62x SoCs. Add DTS(I) for the AM625 (2x Cortex-A53) variant and its combination with our MBa62xx carrier board. Signed-off-by: Nora Schiffer Link: https://patch.msgid.link/333774a1d8787810cd008e63342899ee1ec0fd9d.1772443991.git.nora.schiffer@ew.tq-group.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/Makefile | 1 + .../boot/dts/ti/k3-am625-tqma62xx-mba62xx.dts | 1033 +++++++++++++++++ arch/arm64/boot/dts/ti/k3-am625-tqma62xx.dtsi | 360 ++++++ 3 files changed, 1394 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am625-tqma62xx-mba62xx.dts create mode 100644 arch/arm64/boot/dts/ti/k3-am625-tqma62xx.dtsi diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index 6aaa4a2a7561..7642c06ca834 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -14,6 +14,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am625-beagleplay-csi2-ov5640.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-beagleplay-csi2-tevi-ov5640.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-phyboard-lyra-rdk.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-sk.dtb +dtb-$(CONFIG_ARCH_K3) += k3-am625-tqma62xx-mba62xx.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-dahlia.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-dev.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-ivy.dtb diff --git a/arch/arm64/boot/dts/ti/k3-am625-tqma62xx-mba62xx.dts b/arch/arm64/boot/dts/ti/k3-am625-tqma62xx-mba62xx.dts new file mode 100644 index 000000000000..efc00d2a860a --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am625-tqma62xx-mba62xx.dts @@ -0,0 +1,1033 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT +/* + * Copyright (C) 2021-2022 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (c) 2023-2026 TQ-Systems GmbH , D-82229 Seefeld, Germany. + * Author: Nora Schiffer + */ + +/dts-v1/; + +#include +#include +#include +#include +#include +#include "k3-am625-tqma62xx.dtsi" + +/ { + compatible = "tq,am625-tqma6254-mba62xx", "tq,am625-tqma6254", + "ti,am625"; + model = "TQ-Systems TQMa62xx SoM on MBa62xx carrier board"; + chassis-type = "embedded"; + + aliases { + can0 = &mcu_mcan0; + can1 = &mcu_mcan1; + ethernet0 = &cpsw_port1; + ethernet1 = &cpsw_port2; + i2c1 = &main_i2c1; + mmc1 = &sdhci1; + mmc2 = &sdhci2; + serial0 = &main_uart0; + serial1 = &mcu_uart0; + spi1 = &main_spi0; + usb0 = &usb0; + usb1 = &usb1; + }; + + chosen { + stdout-path = &main_uart0; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + pinctrl-names = "default"; + pinctrl-0 = <&backlight_pins>; + enable-gpios = <&main_gpio0 38 GPIO_ACTIVE_HIGH>; + /* Enabled by display overlays */ + status = "disabled"; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&gpio_key_pins>; + + user-button { + label = "USER_BUTTON"; + linux,code = ; + gpios = <&main_gpio0 40 GPIO_ACTIVE_LOW>; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&gpio_led_pins>; + + led-1 { + gpios = <&main_gpio0 41 GPIO_ACTIVE_HIGH>; + color = ; + function = LED_FUNCTION_INDICATOR; + }; + + led-2 { + gpios = <&main_gpio0 42 GPIO_ACTIVE_HIGH>; + color = ; + function = LED_FUNCTION_INDICATOR; + }; + }; + + panel: panel { + pinctrl-names = "default"; + pinctrl-0 = <&lvds_panel_pins>; + enable-gpios = <&main_gpio0 36 GPIO_ACTIVE_HIGH>; + power-supply = <®_lvds_pwr>; + /* Completed and enabled by display overlays */ + status = "disabled"; + }; + + fan0: pwm-fan { + compatible = "pwm-fan"; + pinctrl-names = "default"; + pinctrl-0 = <&pwm_fan_pins>; + fan-supply = <®_pwm_fan>; + #cooling-cells = <2>; + /* typical 25 kHz -> 40.000 nsec */ + pwms = <&epwm0 1 40000 PWM_POLARITY_INVERTED>; + cooling-levels = <0 32 64 128 196 240>; + pulses-per-revolution = <2>; + interrupt-parent = <&main_gpio1>; + interrupts = <30 IRQ_TYPE_EDGE_FALLING>; + /* + * 4-pin connector for optional fan - disabled by default, as + * PWM period may need to be adjusted for the used fan + */ + status = "disabled"; + }; + + wifi_pwrseq: pwrseq-wifi { + compatible = "mmc-pwrseq-simple"; + pinctrl-names = "default"; + pinctrl-0 = <&main_mmc2_pwrseq_pins>; + reset-gpios = <&main_gpio0 44 GPIO_ACTIVE_HIGH>; + }; + + reg_1v8: regulator-1v8 { + compatible = "regulator-fixed"; + regulator-name = "V_1V8_MBA"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + reg_3v3_sd: regulator-3v3-sd { + /* TPS22963CYZTP */ + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <®_3v3_sd_pins>; + regulator-name = "V_3V3_SD"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + enable-active-high; + vin-supply = <®_3v3>; + gpio = <&main_gpio1 8 GPIO_ACTIVE_HIGH>; + bootph-all; + }; + + reg_lvds_pwr: regulator-lvds-pwr { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <®_lvds_pwr_pins>; + regulator-name = "LVDS0_PWR"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + enable-active-high; + vin-supply = <®_3v3>; + gpio = <&main_gpio0 61 GPIO_ACTIVE_HIGH>; + }; + + reg_pwm_fan: regulator-pwm-fan { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <®_pwm_fan_pins>; + regulator-name = "FAN_PWR"; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + gpio = <&main_gpio0 62 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + sound: sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "tqm-tlv320aic32"; + simple-audio-card,widgets = + "Line Out", "Line Out", + "Line In", "Line In", + "Microphone", "Microphone Jack"; + simple-audio-card,routing = + "Line Out", "LOL", + "Line Out", "LOR", + "IN1_L", "Line In", + "IN1_R", "Line In", + "IN3_L", "Microphone Jack", + "Microphone Jack", "Mic Bias"; + simple-audio-card,format = "i2s"; + simple-audio-card,bitclock-master = <&sound_master>; + simple-audio-card,frame-master = <&sound_master>; + + simple-audio-card,cpu { + sound-dai = <&mcasp1>; + }; + + sound_master: simple-audio-card,codec { + sound-dai = <&tlv320aic32x4>; + clocks = <&audio_refclk0>; + }; + }; +}; + +&audio_refclk0 { + /* Set parent to POSTDIV1_16FFT_MAIN_1_HSDIVOUT6, for 96MHz clock output */ + assigned-clock-parents = <&k3_clks 157 7>; +}; + +&cpsw3g { + pinctrl-names = "default"; + pinctrl-0 = <&main_rgmii1_pins>, <&main_rgmii2_pins>; + status = "okay"; +}; + +&cpsw_port1 { + phy-mode = "rgmii-id"; + phy-handle = <&cpsw3g_phy0>; +}; + +&cpsw_port2 { + phy-mode = "rgmii-id"; + phy-handle = <&cpsw3g_phy3>; +}; + +&cpsw3g_mdio { + pinctrl-names = "default"; + pinctrl-0 = <&main_mdio1_pins>; + status = "okay"; + + cpsw3g_phy0: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x0>; + reset-gpios = <&main_gpio1 11 GPIO_ACTIVE_LOW>; + reset-assert-us = <1000>; + reset-deassert-us = <1000>; + ti,fifo-depth = ; + ti,clk-output-sel = ; + }; + + cpsw3g_phy3: ethernet-phy@3 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x3>; + reset-gpios = <&main_gpio1 12 GPIO_ACTIVE_LOW>; + reset-assert-us = <1000>; + reset-deassert-us = <1000>; + ti,fifo-depth = ; + ti,clk-output-sel = ; + }; +}; + +&dss { + pinctrl-names = "default"; + pinctrl-0 = <&dss_pins>; +}; + +&epwm0 { + status = "okay"; +}; + +&epwm1 { + status = "okay"; +}; + +&main_gpio0 { + pinctrl-names = "default"; + pinctrl-0 = <&main_gpio0_pins>, <&main_gpio0_pr0_pins>; + gpio-line-names = + "", "", "", "", /* 0-3 */ + "", "", "", "", /* 4-7 */ + "", "", "", "", /* 8-11 */ + "ADC_SYNC", "ADC_RST#", "ADC_DATA_RDY", "", /* 12-15 */ + "", "", "", "", /* 16-19 */ + "", "", "", "", /* 20-23 */ + "", "", "", "", /* 24-27 */ + "", "", "", "", /* 28-31 */ + "", "", "", "", /* 32-35 */ + "", "", "", "BG95_PWRKEY", /* 36-39 */ + "", "", "", "BG95_RESET", /* 40-43 */ + "", "", "", "", /* 44-47 */ + "", "", "", "", /* 48-51 */ + "", "", "", "", /* 52-55 */ + "", "", "", "", /* 56-59 */ + "", "", "", "", /* 60-63 */ + "", "", "", "", /* 64-67 */ + "", "", "", "", /* 68-71 */ + "ADC_INT"; /* 72- */ + bootph-all; +}; + +&main_gpio1 { + pinctrl-names = "default"; + pinctrl-0 = <&main_gpio1_pins>, <&main_gpio1_pr0_pins>; + bootph-all; + + /* No overcurrent handling in USB host driver - pin is hogged for now */ + line7-hog { + gpio-hog; + gpios = <7 GPIO_ACTIVE_HIGH>; + line-name = "USB0_VBUS_OC#"; + input; + }; +}; + +&main_i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&main_i2c1_pins>; + clock-frequency = <400000>; + status = "okay"; + + tlv320aic32x4: audio-codec@18 { + compatible = "ti,tlv320aic32x4"; + reg = <0x18>; + pinctrl-names = "default"; + pinctrl-0 = <&audio_codec_pins>; + #sound-dai-cells = <0>; + clock-names = "mclk"; + clocks = <&audio_refclk0>; + reset-gpios = <&main_gpio0 33 GPIO_ACTIVE_LOW>; + iov-supply = <®_1v8>; + ldoin-supply = <®_3v3>; + }; +}; + +&main_spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&main_spi0_pins>; + ti,pindir-d0-out-d1-in; + status = "okay"; + + /* adc@0: NXP NAFE13388 */ +}; + +&main0_thermal { + trips { + main0_active0: trip-active0 { + temperature = <40000>; + hysteresis = <5000>; + type = "active"; + }; + + main0_active1: trip-active1 { + temperature = <48000>; + hysteresis = <3000>; + type = "active"; + }; + + main0_active2: trip-active2 { + temperature = <60000>; + hysteresis = <10000>; + type = "active"; + }; + }; + + cooling-maps { + map1 { + trip = <&main0_active0>; + cooling-device = <&fan0 1 1>; + }; + + map2 { + trip = <&main0_active1>; + cooling-device = <&fan0 2 2>; + }; + + map3 { + trip = <&main0_active2>; + cooling-device = <&fan0 3 3>; + }; + }; +}; + +&main1_thermal { + trips { + main1_active0: trip-active0 { + temperature = <40000>; + hysteresis = <5000>; + type = "active"; + }; + + main1_active1: trip-active1 { + temperature = <48000>; + hysteresis = <3000>; + type = "active"; + }; + + main1_active2: trip-active2 { + temperature = <60000>; + hysteresis = <10000>; + type = "active"; + }; + }; + + cooling-maps { + map1 { + trip = <&main1_active0>; + cooling-device = <&fan0 1 1>; + }; + + map2 { + trip = <&main1_active1>; + cooling-device = <&fan0 2 2>; + }; + + map3 { + trip = <&main1_active2>; + cooling-device = <&fan0 3 3>; + }; + }; +}; + +/* Main console */ +&main_uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&main_uart0_pins>; + bootph-all; + status = "okay"; +}; + +/* + * IOT module - GNSS UART + * + * Board configuration must not enable UART trace output for TIFS firmware + */ +&main_uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&main_uart1_pins>; + /* IOT module uses USB by default, UART can be enabled as fallback */ + status = "disabled"; +}; + +/* Bluetooth module */ +&main_uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&main_uart2_pins>; + /* Bluetooth module uses SDIO by default, UART can be enabled as fallback */ + status = "disabled"; +}; + +/* IOT module - main UART */ +&main_uart5 { + pinctrl-names = "default"; + pinctrl-0 = <&main_uart5_pins>; + /* IOT module uses USB by default, UART can be enabled as fallback */ + status = "disabled"; +}; + +&mcasp1 { + pinctrl-names = "default"; + pinctrl-0 = <&main_mcasp1_pins>; + #sound-dai-cells = <0>; + op-mode = <0>; /* MCASP_IIS_MODE */ + tdm-slots = <2>; + serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ + 1 0 2 0 + 0 0 0 0 + 0 0 0 0 + 0 0 0 0 + >; + tx-num-evt = <0>; + rx-num-evt = <0>; + status = "okay"; +}; + +&mcu_gpio0 { + pinctrl-names = "default"; + pinctrl-0 = <&mcu_gpio0_pins>; + gpio-line-names = + "EN_DIG_OUT_1", "EN_DIG_OUT_2", "STATUS_OUT_1", "STATUS_OUT_2", /* 0-3 */ + "EN_DIG_OUT_3", "", "", "V_VPP_EN", /* 4-7 */ + "", "", "", "EN_DIG_OUT_4", /* 8-11 */ + "STATUS_OUT_3", "", "", "", /* 12-15 */ + "", "STATUS_OUT_4", "DIG_IN_1", "DIG_IN_2", /* 16-19 */ + "DIG_IN_3", "", "", "DIG_IN_4"; /* 20-23 */ + bootph-all; +}; + +&mcu_mcan0 { + pinctrl-names = "default"; + pinctrl-0 = <&mcu_mcan0_pins>; + status = "okay"; +}; + +&mcu_mcan1 { + pinctrl-names = "default"; + pinctrl-0 = <&mcu_mcan1_pins>; + status = "okay"; +}; + +&mcu_uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&mcu_uart0_pins>; + rs485-rts-active-low; + linux,rs485-enabled-at-boot-time; + status = "okay"; +}; + +®_sd { + pinctrl-names = "default"; + pinctrl-0 = <®_sd_pins>; + gpios = <&main_gpio0 31 GPIO_ACTIVE_LOW>; + bootph-all; + status = "okay"; +}; + +&sdhci1 { + /* SD-card */ + pinctrl-names = "default"; + pinctrl-0 = <&main_mmc1_pins>; + vmmc-supply = <®_3v3_sd>; + vqmmc-supply = <®_sd>; + bus-width = <4>; + disable-wp; + no-mmc; + no-sdio; + bootph-all; + ti,driver-strength-ohm = <50>; + status = "okay"; +}; + +&sdhci2 { + /* WLAN */ + pinctrl-names = "default"; + pinctrl-0 = <&main_mmc2_pins>; + mmc-pwrseq = <&wifi_pwrseq>; + keep-power-in-suspend; + cap-power-off-card; + bus-width = <4>; + non-removable; + no-mmc; + no-sd; + ti,driver-strength-ohm = <50>; + ti,fails-without-test-cd; + status = "okay"; +}; + +&usbss0 { + bootph-all; + ti,vbus-divider; + status = "okay"; +}; + +&usbss1 { + ti,vbus-divider; + status = "okay"; +}; + +&usb0 { + pinctrl-names = "default"; + pinctrl-0 = <&main_usb0_pins>; + dr_mode = "otg"; + usb-role-switch; + bootph-all; + + connector { + compatible = "gpio-usb-b-connector", "usb-b-connector"; + id-gpios = <&main_gpio0 71 GPIO_ACTIVE_HIGH>; + type = "micro"; + }; +}; + +&usb1 { + pinctrl-names = "default"; + pinctrl-0 = <&main_usb1_hub_pins>; + #address-cells = <1>; + #size-cells = <0>; + dr_mode = "host"; + + usb1_hub_2_0: hub@1 { + compatible = "usb424,2514"; + reg = <1>; + reset-gpios = <&main_gpio1 23 GPIO_ACTIVE_HIGH>; + vdd-supply = <®_3v3>; + vdda-supply = <®_3v3>; + }; +}; + +&wkup_uart0 { + /* WKUP UART0 is used by DM firmware */ + status = "reserved"; +}; + +&main_pmx0 { + audio_codec_pins: audio-codec-pins { + pinctrl-single,pins = < + /* (L24) GPMC0_OEn_REn.GPIO0_33 */ + AM62X_IOPAD(0x088, PIN_OUTPUT, 7) + /* (A15) UART0_CTSn.AUDIO_EXT_REFCLK0 */ + AM62X_IOPAD(0x1d0, PIN_OUTPUT, 5) + >; + }; + + backlight_pins: backlight-pins { + pinctrl-single,pins = < + /* (V25) GPMC0_WAIT1.GPIO0_38 */ + AM62X_IOPAD(0x009c, PIN_OUTPUT, 7) + /* (E18) MCASP0_AXR0.EHRPWM1_B */ + AM62X_IOPAD(0x01a0, PIN_OUTPUT, 6) + >; + }; + + dss_pins: dss-pins { + pinctrl-single,pins = < + /* (AA5) OLDI0_A0N */ + AM62X_IOPAD(0x0260, PIN_OUTPUT, 0) + /* (Y6) OLDI0_A0P */ + AM62X_IOPAD(0x025c, PIN_OUTPUT, 0) + /* (AD3) OLDI0_A1N */ + AM62X_IOPAD(0x0268, PIN_OUTPUT, 0) + /* (AB4) OLDI0_A1P */ + AM62X_IOPAD(0x0264, PIN_OUTPUT, 0) + /* (Y8) OLDI0_A2N */ + AM62X_IOPAD(0x0270, PIN_OUTPUT, 0) + /* (AA8) OLDI0_A2P */ + AM62X_IOPAD(0x026c, PIN_OUTPUT, 0) + /* (AB6) OLDI0_A3N */ + AM62X_IOPAD(0x0278, PIN_OUTPUT, 0) + /* (AA7) OLDI0_A3P */ + AM62X_IOPAD(0x0274, PIN_OUTPUT, 0) + /* (AC6) OLDI0_A4N */ + AM62X_IOPAD(0x0280, PIN_OUTPUT, 0) + /* (AC5) OLDI0_A4P */ + AM62X_IOPAD(0x027c, PIN_OUTPUT, 0) + /* (AE5) OLDI0_A5N */ + AM62X_IOPAD(0x0288, PIN_OUTPUT, 0) + /* (AD6) OLDI0_A5P */ + AM62X_IOPAD(0x0284, PIN_OUTPUT, 0) + /* (AE6) OLDI0_A6N */ + AM62X_IOPAD(0x0290, PIN_OUTPUT, 0) + /* (AD7) OLDI0_A6P */ + AM62X_IOPAD(0x028c, PIN_OUTPUT, 0) + /* (AD8) OLDI0_A7N */ + AM62X_IOPAD(0x0298, PIN_OUTPUT, 0) + /* (AE7) OLDI0_A7P */ + AM62X_IOPAD(0x0294, PIN_OUTPUT, 0) + /* (AD4) OLDI0_CLK0N */ + AM62X_IOPAD(0x02a0, PIN_OUTPUT, 0) + /* (AE3) OLDI0_CLK0P */ + AM62X_IOPAD(0x029c, PIN_OUTPUT, 0) + /* (AE4) OLDI0_CLK1N */ + AM62X_IOPAD(0x02a8, PIN_OUTPUT, 0) + /* (AD5) OLDI0_CLK1P */ + AM62X_IOPAD(0x02a4, PIN_OUTPUT, 0) + >; + }; + + csi_clk_pins: csi-clk-pins { + pinctrl-single,pins = < + /* (B18) MCASP0_AXR1.EHRPWM1_A */ + AM62X_IOPAD(0x019c, PIN_OUTPUT, 6) + >; + }; + + gpio_key_pins: gpio-key-pins { + pinctrl-single,pins = < + /* (M22) GPMC0_DIR.GPIO0_40 */ + AM62X_IOPAD(0x0a4, PIN_INPUT, 7) + >; + }; + + gpio_led_pins: gpio-led-pins { + pinctrl-single,pins = < + /* (M21) GPMC0_CSn0.GPIO0_41 */ + AM62X_IOPAD(0x0a8, PIN_OUTPUT, 7) + /* (L21) GPMC0_CSn1.GPIO0_42 */ + AM62X_IOPAD(0x0ac, PIN_OUTPUT, 7) + >; + }; + + lvds_panel_pins: lvds-panel-pins { + pinctrl-single,pins = < + /* (N20) GPMC0_BE1n.GPIO0_36 - LVDS0_RESET# */ + AM62X_IOPAD(0x0094, PIN_OUTPUT, 7) + >; + }; + + main_gpio0_pins: main-gpio0-pins { + pinctrl-single,pins = < + /* Control GPIOs for IOT Module */ + /* (K25) GPMC0_WPn.GPIO0_39 - BG95_PWRKEY */ + AM62X_IOPAD(0x0a0, PIN_OUTPUT, 7) + /* (K22) GPMC0_CSn2.GPIO0_43 - BG95_RESET */ + AM62X_IOPAD(0x0b0, PIN_OUTPUT, 7) + >; + }; + + main_gpio0_pr0_pins: main-gpio0-pr0-pins { + pinctrl-single,pins = < + /* (N24) GPMC0_AD2.GPIO0_17 */ + AM62X_IOPAD(0x0044, PIN_INPUT, 7) + /* (N25) GPMC0_AD3.GPIO0_18 */ + AM62X_IOPAD(0x0048, PIN_INPUT, 7) + /* (P24) GPMC0_AD4.GPIO0_19 */ + AM62X_IOPAD(0x004c, PIN_INPUT, 7) + /* (P22) GPMC0_AD5.GPIO0_20 */ + AM62X_IOPAD(0x0050, PIN_INPUT, 7) + /* (W25) VOUT0_DATA2.GPIO0_47 */ + AM62X_IOPAD(0x00c0, PIN_INPUT, 7) + /* (W24) VOUT0_DATA3.GPIO0_48 */ + AM62X_IOPAD(0x00c4, PIN_INPUT, 7) + /* (Y25) VOUT0_DATA4.GPIO0_49 */ + AM62X_IOPAD(0x00c8, PIN_INPUT, 7) + /* (Y24) VOUT0_DATA5.GPIO0_50 */ + AM62X_IOPAD(0x00cc, PIN_INPUT, 7) + >; + }; + + main_gpio1_pins: main-gpio1-pins { + pinctrl-single,pins = < + /* (B19) MCASP0_AXR3.GPIO1_7 - USB0_VBUS_OC# */ + AM62X_IOPAD(0x0194, PIN_INPUT, 7) + >; + }; + + main_gpio1_pr0_pins: main-gpio1-pr0-pins { + pinctrl-single,pins = < + /* (C15) MCAN0_TX.GPIO1_24 */ + AM62X_IOPAD(0x01d8, PIN_INPUT, 7) + /* (E15) MCAN0_RX.GPIO1_25 */ + AM62X_IOPAD(0x01dc, PIN_INPUT, 7) + >; + }; + + main_i2c1_pins: main-i2c1-pins { + pinctrl-single,pins = < + /* (B17) I2C1_SCL */ + AM62X_IOPAD(0x1e8, PIN_INPUT, 0) + /* (A17) I2C1_SDA */ + AM62X_IOPAD(0x1ec, PIN_INPUT, 0) + >; + }; + + main_mcasp1_pins: main-mcasp1-pins { + pinctrl-single,pins = < + /* (M24) GPMC0_BE0N_CLE.MCASP1_ACLKX */ + AM62X_IOPAD(0x090, PIN_INPUT, 2) + /* (U23) GPMC0_WAIT0.MCASP1_AFSX */ + AM62X_IOPAD(0x098, PIN_INPUT, 2) + /* (L25) GPMC0_WEN.MCASP1_AXR0 */ + AM62X_IOPAD(0x08c, PIN_OUTPUT, 2) + /* (L23) GPMC0_ADVN_ALE.MCASP1_AXR2 */ + AM62X_IOPAD(0x084, PIN_INPUT, 2) + >; + }; + + main_mmc1_pins: main-mmc1-pins { + pinctrl-single,pins = < + /* (A21) MMC1_CMD */ + AM62X_IOPAD(0x23c, PIN_INPUT, 0) + /* (B22) MMC1_CLK */ + AM62X_IOPAD(0x234, PIN_INPUT, 0) + /* (A22) MMC1_DAT0 */ + AM62X_IOPAD(0x230, PIN_INPUT, 0) + /* (B21) MMC1_DAT1 */ + AM62X_IOPAD(0x22c, PIN_INPUT, 0) + /* (C21) MMC1_DAT2 */ + AM62X_IOPAD(0x228, PIN_INPUT, 0) + /* (D22) MMC1_DAT3 */ + AM62X_IOPAD(0x224, PIN_INPUT, 0) + /* (D17) MMC1_SDCD */ + AM62X_IOPAD(0x240, PIN_INPUT, 0) + >; + bootph-all; + }; + + main_mmc2_pins: main-mmc2-pins { + pinctrl-single,pins = < + /* (C24) MMC2_CMD */ + AM62X_IOPAD(0x120, PIN_INPUT, 0) + /* (D25) MMC2_CLK */ + AM62X_IOPAD(0x118, PIN_INPUT, 0) + /* (B24) MMC2_DAT0 */ + AM62X_IOPAD(0x114, PIN_INPUT, 0) + /* (C25) MMC2_DAT1 */ + AM62X_IOPAD(0x110, PIN_INPUT, 0) + /* (E23) MMC2_DAT2 */ + AM62X_IOPAD(0x10c, PIN_INPUT, 0) + /* (D24) MMC2_DAT3 */ + AM62X_IOPAD(0x108, PIN_INPUT, 0) + /* (#N/A) MMC2_CLKB */ + AM62X_IOPAD(0x11c, PIN_INPUT, 0) + >; + }; + + main_mmc2_pwrseq_pins: main-mmc2-pwrseq-pins { + pinctrl-single,pins = < + /* (K24) GPMC0_CSn3.GPIO0_44 - WIFI-BT_EN */ + AM62X_IOPAD(0x00b4, PIN_OUTPUT, 7) + >; + }; + + main_mdio1_pins: main-mdio1-pins { + pinctrl-single,pins = < + /* (B20) MCASP0_ACLKX.GPIO1_11 - RESET_RGMII1# */ + AM62X_IOPAD(0x1a4, PIN_OUTPUT, 7) + /* (D20) MCASP0_AFSX.GPIO1_12 - RESET_RGMII2# */ + AM62X_IOPAD(0x1a8, PIN_OUTPUT, 7) + + /* (AD24) MDIO0_MDC */ + AM62X_IOPAD(0x160, PIN_OUTPUT, 0) + /* (AB22) MDIO0_MDIO */ + AM62X_IOPAD(0x15c, PIN_INPUT, 0) + >; + }; + + main_rgmii1_pins: main-rgmii1-pins { + pinctrl-single,pins = < + /* (AB17) RGMII1_RD0 */ + AM62X_IOPAD(0x14c, PIN_INPUT, 0) + /* (AC17) RGMII1_RD1 */ + AM62X_IOPAD(0x150, PIN_INPUT, 0) + /* (AB16) RGMII1_RD2 */ + AM62X_IOPAD(0x154, PIN_INPUT, 0) + /* (AA15) RGMII1_RD3 */ + AM62X_IOPAD(0x158, PIN_INPUT, 0) + /* (AD17) RGMII1_RXC */ + AM62X_IOPAD(0x148, PIN_INPUT, 0) + /* (AE17) RGMII1_RX_CTL */ + AM62X_IOPAD(0x144, PIN_INPUT, 0) + /* (AE20) RGMII1_TD0 */ + AM62X_IOPAD(0x134, PIN_OUTPUT, 0) + /* (AD20) RGMII1_TD1 */ + AM62X_IOPAD(0x138, PIN_OUTPUT, 0) + /* (AE18) RGMII1_TD2 */ + AM62X_IOPAD(0x13c, PIN_OUTPUT, 0) + /* (AD18) RGMII1_TD3 */ + AM62X_IOPAD(0x140, PIN_OUTPUT, 0) + /* (AE19) RGMII1_TXC */ + AM62X_IOPAD(0x130, PIN_OUTPUT, 0) + /* (AD19) RGMII1_TX_CTL */ + AM62X_IOPAD(0x12c, PIN_OUTPUT, 0) + >; + }; + + main_rgmii2_pins: main-rgmii2-pins { + pinctrl-single,pins = < + /* (AE23) RGMII2_RD0 */ + AM62X_IOPAD(0x184, PIN_INPUT, 0) + /* (AB20) RGMII2_RD1 */ + AM62X_IOPAD(0x188, PIN_INPUT, 0) + /* (AC21) RGMII2_RD2 */ + AM62X_IOPAD(0x18c, PIN_INPUT, 0) + /* (AE22) RGMII2_RD3 */ + AM62X_IOPAD(0x190, PIN_INPUT, 0) + /* (AD23) RGMII2_RXC */ + AM62X_IOPAD(0x180, PIN_INPUT, 0) + /* (AD22) RGMII2_RX_CTL */ + AM62X_IOPAD(0x17c, PIN_INPUT, 0) + /* (Y18) RGMII2_TD0 */ + AM62X_IOPAD(0x16c, PIN_OUTPUT, 0) + /* (AA18) RGMII2_TD1 */ + AM62X_IOPAD(0x170, PIN_OUTPUT, 0) + /* (AD21) RGMII2_TD2 */ + AM62X_IOPAD(0x174, PIN_OUTPUT, 0) + /* (AC20) RGMII2_TD3 */ + AM62X_IOPAD(0x178, PIN_OUTPUT, 0) + /* (AE21) RGMII2_TXC */ + AM62X_IOPAD(0x168, PIN_OUTPUT, 0) + /* (AA19) RGMII2_TX_CTL */ + AM62X_IOPAD(0x164, PIN_OUTPUT, 0) + >; + }; + + main_spi0_pins: main-spi0-pins { + pinctrl-single,pins = < + /* (A14) SPI0_CLK */ + AM62X_IOPAD(0x1bc, PIN_OUTPUT, 0) + /* (A13) SPI0_CS0 */ + AM62X_IOPAD(0x1b4, PIN_OUTPUT, 0) + /* (B13) SPI0_D0 */ + AM62X_IOPAD(0x1c0, PIN_OUTPUT, 0) + /* (B14) SPI0_D1 */ + AM62X_IOPAD(0x1c4, PIN_INPUT, 0) + >; + }; + + main_spi0_adc_pins: main-spi0-adc-pins { + pinctrl-single,pins = < + /* (G21) OSPI0_CSn1.GPIO0_12 - ADC_SYNC */ + AM62X_IOPAD(0x030, PIN_INPUT, 7) + /* (H21) OSPI0_CSn2.GPIO0_13 - ADC_RST# */ + AM62X_IOPAD(0x034, PIN_OUTPUT, 7) + /* (E24) OSPI0_CSn3.GPIO0_14 - ADC_DATA_RDY */ + AM62X_IOPAD(0x038, PIN_INPUT, 7) + /* (B23) MMC2_SDWP.GPIO0_72 - ADC_INT# */ + AM62X_IOPAD(0x128, PIN_INPUT, 7) + >; + }; + + main_uart0_pins: main-uart0-pins { + pinctrl-single,pins = < + /* (D14) UART0_RXD */ + AM62X_IOPAD(0x1c8, PIN_INPUT, 0) + /* (E14) UART0_TXD */ + AM62X_IOPAD(0x1cc, PIN_OUTPUT, 0) + >; + bootph-all; + }; + + main_uart1_pins: main-uart1-pins { + pinctrl-single,pins = < + /* (E19) MCASP0_AFSR.UART1_RXD */ + AM62X_IOPAD(0x1ac, PIN_INPUT, 2) + /* (A20) MCASP0_ACLKR.UART1_TXD */ + AM62X_IOPAD(0x1b0, PIN_OUTPUT, 2) + >; + }; + + main_uart2_pins: main-uart2-pins { + pinctrl-single,pins = < + /* (U22) VOUT0_DATA0.UART2_RXD */ + AM62X_IOPAD(0x0b8, PIN_INPUT, 4) + /* (V24) VOUT0_DATA1.UART2_TXD */ + AM62X_IOPAD(0x0bc, PIN_OUTPUT, 4) + /* (AC24) VOUT0_PCLK.UART2_CTS# */ + AM62X_IOPAD(0x104, PIN_INPUT, 4) + /* (AC25) VOUT0_VSYNC.UART2_RTS# */ + AM62X_IOPAD(0x100, PIN_OUTPUT, 4) + >; + }; + + main_uart5_pins: main-uart5-pins { + pinctrl-single,pins = < + /* (Y23) VOUT0_DATA6.UART5_RXD */ + AM62X_IOPAD(0x0d0, PIN_INPUT, 4) + /* (AA25) VOUT0_DATA7.UART5_TXD */ + AM62X_IOPAD(0x0d4, PIN_OUTPUT, 4) + >; + }; + + main_usb0_pins: main-usb0-pins { + pinctrl-single,pins = < + /* (C20) USB0_DRVVBUS */ + AM62X_IOPAD(0x254, PIN_OUTPUT, 0) + /* (A23) MMC2_SDCD.GPIO0_71 */ + AM62X_IOPAD(0x124, PIN_INPUT, 7) + >; + }; + + main_usb1_hub_pins: main-usb1-hub-pins { + pinctrl-single,pins = < + /* (B15) UART0_RTSn.GPIO1_23 - USB_HUB_RESET */ + AM62X_IOPAD(0x01d4, PIN_OUTPUT, 7) + >; + }; + + pwm_fan_pins: pwm-fan-pins { + pinctrl-single,pins = < + /* (C13) SPI0_CS1.EHRPWM0_B - FAN_PWM */ + AM62X_IOPAD(0x01b8, PIN_OUTPUT, 2) + /* (A18) EXT_REFCLK1.GPIO1_30 - FAN_RPM */ + AM62X_IOPAD(0x01f0, PIN_INPUT, 7) + >; + }; + + reg_3v3_sd_pins: reg-3v3-sd-pins { + pinctrl-single,pins = < + /* (A19) MCASP0_AXR2.GPIO1_8 */ + AM62X_IOPAD(0x198, PIN_OUTPUT, 7) + >; + bootph-all; + }; + + reg_lvds_pwr_pins: reg-lvds-pwr-pins { + pinctrl-single,pins = < + /* (AB24) VOUT0_HSYNC.GPIO0_61 */ + AM62X_IOPAD(0x00f8, PIN_OUTPUT, 7) + >; + }; + + reg_pwm_fan_pins: reg-pwm-fan-pins { + pinctrl-single,pins = < + /* (Y20) VOUT0_DE.GPIO0_62 */ + AM62X_IOPAD(0x00fc, PIN_OUTPUT, 7) + >; + }; + + reg_sd_pins: reg-sd-pins { + pinctrl-single,pins = < + /* (P25) GPMC0_CLK.GPIO0_31 */ + AM62X_IOPAD(0x07c, PIN_OUTPUT, 7) + >; + bootph-all; + }; +}; + +&mcu_pmx0 { + mcu_gpio0_pins: mcu-gpio0-pins { + pinctrl-single,pins = < + /* (E8) MCU_SPI0_CS0.MCU_GPIO0_0 - EN_DIG_OUT1 */ + AM62X_MCU_IOPAD(0x000, PIN_OUTPUT, 7) + /* (B8) MCU_SPI0_CS1.MCU_GPIO0_1 - EN_DIG_OUT2 */ + AM62X_MCU_IOPAD(0x004, PIN_OUTPUT, 7) + /* (A7) MCU_SPI0_CLK.MCU_GPIO0_2 - STATUS_OUT1 */ + AM62X_MCU_IOPAD(0x008, PIN_INPUT, 7) + /* (D9) MCU_SPI0_D0.MCU_GPIO0_3 - STATUS_OUT2 */ + AM62X_MCU_IOPAD(0x00c, PIN_INPUT, 7) + /* (C9) MCU_SPI0_D1.MCU_GPIO0_4 - EN_DIG_OUT3 */ + AM62X_MCU_IOPAD(0x010, PIN_OUTPUT, 7) + /* (C6) WKUP_UART0_CTSn.MCU_GPIO0_11 - EN_DIG_OUT4 */ + AM62X_MCU_IOPAD(0x02c, PIN_OUTPUT, 7) + /* (A4) WKUP_UART0_RTSn.MCU_GPIO0_12 - STATUS_OUT3 */ + AM62X_MCU_IOPAD(0x030, PIN_INPUT, 7) + /* (A8) MCU_I2C0_SCL.MCU_GPIO0_17 - STATUS_OUT4 */ + AM62X_MCU_IOPAD(0x044, PIN_INPUT, 7) + /* (D10) MCU_I2C0_SDA.MCU_GPIO0_18 - DIG_IN_1 */ + AM62X_MCU_IOPAD(0x048, PIN_INPUT, 7) + /* (B9) WKUP_I2C0_SCL.MCU_GPIO0_19 - DIG_IN_2 */ + AM62X_MCU_IOPAD(0x04c, PIN_INPUT, 7) + /* (A9) WKUP_I2C0_SDA.MCU_GPIO0_20 - DIG_IN_3 */ + AM62X_MCU_IOPAD(0x050, PIN_INPUT, 7) + /* (A12) WKUP_CLKOUT0.MCU_GPIO0_23 - DIG_IN_4 */ + AM62X_MCU_IOPAD(0x084, PIN_INPUT, 7) + /* (A6) MCU_UART0_CTSn.MCU_GPIO0_7 - V_VPP_EN */ + AM62X_MCU_IOPAD(0x01c, PIN_OUTPUT, 7) + >; + }; + mcu_mcan0_pins: mcu-mcan0-pins { + pinctrl-single,pins = < + /* (B3) MCU_MCAN0_RX */ + AM62X_MCU_IOPAD(0x038, PIN_INPUT, 0) + /* (D6) MCU_MCAN0_TX */ + AM62X_MCU_IOPAD(0x034, PIN_OUTPUT, 0) + >; + }; + + mcu_mcan1_pins: mcu-mcan1-pins { + pinctrl-single,pins = < + /* (D4) MCU_MCAN1_RX */ + AM62X_MCU_IOPAD(0x040, PIN_INPUT, 0) + /* (E5) MCU_MCAN1_TX */ + AM62X_MCU_IOPAD(0x03c, PIN_OUTPUT, 0) + >; + }; + + mcu_uart0_pins: mcu-uart0-pins { + pinctrl-single,pins = < + /* (B5) MCU_UART0_RXD */ + AM62X_MCU_IOPAD(0x014, PIN_INPUT, 0) + /* (A5) MCU_UART0_TXD */ + AM62X_MCU_IOPAD(0x018, PIN_OUTPUT, 0) + /* (B6) MCU_UART0_RTS# */ + AM62X_MCU_IOPAD(0x020, PIN_OUTPUT, 0) + >; + }; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am625-tqma62xx.dtsi b/arch/arm64/boot/dts/ti/k3-am625-tqma62xx.dtsi new file mode 100644 index 000000000000..72288678cd01 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am625-tqma62xx.dtsi @@ -0,0 +1,360 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT +/* + * Copyright (C) 2021-2022 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (c) 2023-2026 TQ-Systems GmbH , D-82229 Seefeld, Germany. + * Author: Nora Schiffer + */ + +#include "k3-am625.dtsi" + +/ { + aliases { + i2c0 = &main_i2c0; + mmc0 = &sdhci0; + spi0 = &ospi0; + }; + + memory@80000000 { + device_type = "memory"; + /* 1G RAM */ + reg = <0x00000000 0x80000000 0x00000000 0x40000000>; + bootph-pre-ram; + }; + + reserved_memory: reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + ramoops@9c700000 { + compatible = "ramoops"; + reg = <0x00 0x9c700000 0x00 0x00100000>; + record-size = <0x8000>; + console-size = <0x8000>; + ftrace-size = <0x00>; + pmsg-size = <0x8000>; + }; + + /* global cma region */ + linux,cma { + compatible = "shared-dma-pool"; + reusable; + size = <0x00 0x8000000>; + linux,cma-default; + }; + + rtos_ipc_memory_region: memory@9c800000 { + compatible = "shared-dma-pool"; + reg = <0x00 0x9c800000 0x00 0x00300000>; + no-map; + }; + + wkup_r5fss0_core0_dma_memory_region: memory@9da00000 { + compatible = "shared-dma-pool"; + reg = <0x00 0x9da00000 0x00 0x100000>; + no-map; + }; + + wkup_r5fss0_core0_memory_region: memory@9db00000 { + compatible = "shared-dma-pool"; + reg = <0x00 0x9db00000 0x00 0xc00000>; + no-map; + }; + + secure_tfa_ddr: tfa@9e780000 { + reg = <0x00 0x9e780000 0x00 0x80000>; + alignment = <0x1000>; + no-map; + }; + + secure_ddr: optee@9e800000 { + reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */ + alignment = <0x1000>; + no-map; + }; + }; + + reg_3v3: regulator-3v3 { + compatible = "regulator-fixed"; + regulator-name = "V_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; + + reg_sd: regulator-sd { + /* Output of TPS6521902RSM */ + compatible = "regulator-gpio"; + regulator-name = "V_VDDSHV5"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + vin-supply = <®_ldo1>; + states = <1800000 0x0>, + <3300000 0x1>; + /* Controlling GPIO set by base board */ + status = "disabled"; + }; +}; + +&main_i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&main_i2c0_pins>; + clock-frequency = <400000>; + bootph-pre-ram; + status = "okay"; + + tps65219: pmic@30 { + compatible = "ti,tps65219"; + reg = <0x30>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_irq_pins>; + interrupt-parent = <&gic500>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <1>; + buck1-supply = <®_3v3>; + buck2-supply = <®_3v3>; + buck3-supply = <®_3v3>; + ldo1-supply = <®_3v3>; + ldo2-supply = <®_buck2>; + ldo3-supply = <®_3v3>; + ldo4-supply = <®_3v3>; + system-power-controller; + ti,power-button; + + regulators { + reg_buck1: buck1 { + regulator-name = "V_VDD_CORE"; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <750000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_buck2: buck2 { + regulator-name = "V_1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_buck3: buck3 { + regulator-name = "V_1V1"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_ldo1: ldo1 { + /* Actual voltage of LDO1 is controlled by GPIO, see reg_sd */ + regulator-name = "V_VDDSHV5_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-allow-bypass; + regulator-boot-on; + regulator-always-on; + }; + + reg_ldo2: ldo2 { + regulator-name = "V_0V85"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_ldo3: ldo3 { + regulator-name = "V_1V8A"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_ldo4: ldo4 { + /* Unused */ + regulator-name = "V_VLDO4"; + regulator-boot-on; + }; + }; + }; + + tmp1075: temperature-sensor@4a { + compatible = "ti,tmp1075"; + reg = <0x4a>; + vs-supply = <®_buck2>; + }; + + eeprom0: eeprom@50 { + compatible = "st,24c02", "atmel,24c02"; + reg = <0x50>; + vcc-supply = <®_buck2>; + pagesize = <16>; + read-only; + bootph-pre-ram; + }; + + pcf85063: rtc@51 { + compatible = "nxp,pcf85063a"; + reg = <0x51>; + quartz-load-femtofarads = <12500>; + }; + + eeprom1: eeprom@54 { + compatible = "st,24c64", "atmel,24c64"; + reg = <0x54>; + vcc-supply = <®_buck2>; + pagesize = <32>; + }; +}; + +&a53_opp_table { + opp-1400000000 { + opp-hz = /bits/ 64 <1400000000>; + opp-supported-hw = <0x01 0x0004>; + opp-suspend; + clock-latency-ns = <6000000>; + /* + * Enabled by bootloader if supported. The PMIC configuration + * will be adjusted accordingly, as a higher core voltage is + * required for 1400MHz operation. + */ + status = "disabled"; + }; +}; + +&ospi0 { + pinctrl-names = "default"; + pinctrl-0 = <&ospi0_pins>; + bootph-all; + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0x0>; + vcc-supply = <®_buck2>; + spi-tx-bus-width = <8>; + spi-rx-bus-width = <8>; + spi-max-frequency = <84000000>; + bootph-all; + cdns,tshsl-ns = <60>; + cdns,tsd2d-ns = <60>; + cdns,tchsh-ns = <60>; + cdns,tslch-ns = <60>; + cdns,read-delay = <2>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + /* Filled by bootloader */ + }; + }; +}; + +&sdhci0 { + pinctrl-names = "default"; + pinctrl-0 = <&main_mmc0_pins>; + non-removable; + disable-wp; + no-sd; + no-sdio; + bootph-all; + ti,driver-strength-ohm = <50>; + status = "okay"; +}; + +&wkup_rtc0 { + /* + * Erratum i2327: We can't guarantee that the TQMa62xx will boot fast + * enough for U-Boot to apply the workaround within one second after + * power-on. Keep the RTC disabled to avoid RTC interrupt issues. + * + * The external RTC of the TQMa62xx should be used instead. + * + * If needed, the RTC can be enabled in a baseboard DTS, as long as + * boot is fast enough on all relevant boot media. + */ + status = "disabled"; +}; + +&main_pmx0 { + main_i2c0_pins: main-i2c0-pins { + pinctrl-single,pins = < + /* (B16) I2C0_SCL */ + AM62X_IOPAD(0x1e0, PIN_INPUT, 0) + /* (A16) I2C0_SDA */ + AM62X_IOPAD(0x1e4, PIN_INPUT, 0) + >; + bootph-pre-ram; + }; + + main_mmc0_pins: main-mmc0-pins { + pinctrl-single,pins = < + /* (Y3) MMC0_CMD */ + AM62X_IOPAD(0x220, PIN_INPUT, 0) + /* (AB1) MMC0_CLK */ + AM62X_IOPAD(0x218, PIN_INPUT, 0) + /* (AA2) MMC0_DAT0 */ + AM62X_IOPAD(0x214, PIN_INPUT, 0) + /* (AA1) MMC0_DAT1 */ + AM62X_IOPAD(0x210, PIN_INPUT, 0) + /* (AA3) MMC0_DAT2 */ + AM62X_IOPAD(0x20c, PIN_INPUT, 0) + /* (Y4) MMC0_DAT3 */ + AM62X_IOPAD(0x208, PIN_INPUT, 0) + /* (AB2) MMC0_DAT4 */ + AM62X_IOPAD(0x204, PIN_INPUT, 0) + /* (AC1) MMC0_DAT5 */ + AM62X_IOPAD(0x200, PIN_INPUT, 0) + /* (AD2) MMC0_DAT6 */ + AM62X_IOPAD(0x1fc, PIN_INPUT, 0) + /* (AC2) MMC0_DAT7 */ + AM62X_IOPAD(0x1f8, PIN_INPUT, 0) + >; + bootph-all; + }; + + ospi0_pins: ospi0-pins { + pinctrl-single,pins = < + /* (H24) OSPI0_CLK */ + AM62X_IOPAD(0x000, PIN_OUTPUT, 0) + /* (F23) OSPI0_CSn0 */ + AM62X_IOPAD(0x02c, PIN_OUTPUT, 0) + /* (E25) OSPI0_D0 */ + AM62X_IOPAD(0x00c, PIN_INPUT, 0) + /* (G24) OSPI0_D1 */ + AM62X_IOPAD(0x010, PIN_INPUT, 0) + /* (F25) OSPI0_D2 */ + AM62X_IOPAD(0x014, PIN_INPUT, 0) + /* (F24) OSPI0_D3 */ + AM62X_IOPAD(0x018, PIN_INPUT, 0) + /* (J23) OSPI0_D4 */ + AM62X_IOPAD(0x01c, PIN_INPUT, 0) + /* (J25) OSPI0_D5 */ + AM62X_IOPAD(0x020, PIN_INPUT, 0) + /* (H25) OSPI0_D6 */ + AM62X_IOPAD(0x024, PIN_INPUT, 0) + /* (J22) OSPI0_D7 */ + AM62X_IOPAD(0x028, PIN_INPUT, 0) + /* (J24) OSPI0_DQS */ + AM62X_IOPAD(0x008, PIN_INPUT, 0) + /* (G25) OSPI0_LBCLKO */ + AM62X_IOPAD(0x004, PIN_INPUT, 0) + >; + }; + + pmic_irq_pins: pmic-irq-pins { + pinctrl-single,pins = < + /* (D16) EXTINTn */ + AM62X_IOPAD(0x01f4, PIN_INPUT_PULLUP, 0) + >; + }; +}; + +#include "k3-am62-ti-ipc-firmware.dtsi" From 48f1f6f480741f014f3774096236fff91cdcc297 Mon Sep 17 00:00:00 2001 From: Vitor Soares Date: Wed, 6 May 2026 15:34:26 +0100 Subject: [PATCH 10/20] arm64: dts: ti: k3-am62-verdin: Add DSI to HDMI adapter overlay Add a device-tree overlay for the Toradex DSI to HDMI Adapter, an accessory that connects to the Verdin DSI_1 interface and provides a full-size HDMI Type-A output. The adapter is based on the Lontium LT8912B DSI-to-HDMI bridge. The overlay is also combined with the Verdin AM62 carrier board device trees to provide ready-to-use DTBs for the Dahlia and Development Board carriers, in both WiFi and non-WiFi SoM variants. Link: https://developer.toradex.com/hardware/accessories/add-ons/dsi-hdmi-adapter Signed-off-by: Vitor Soares Link: https://patch.msgid.link/20260506143427.348806-2-ivitro@gmail.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/Makefile | 13 +++ .../dts/ti/k3-am625-verdin-dsi-to-hdmi.dtso | 94 +++++++++++++++++++ 2 files changed, 107 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am625-verdin-dsi-to-hdmi.dtso diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index 7642c06ca834..21db60cd19de 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -9,19 +9,32 @@ # alphabetically. # Boards with AM62x SoC +k3-am625-verdin-nonwifi-dahlia-dsi-to-hdmi-dtbs := k3-am625-verdin-nonwifi-dahlia.dtb \ + k3-am625-verdin-dsi-to-hdmi.dtbo +k3-am625-verdin-nonwifi-dev-dsi-to-hdmi-dtbs := k3-am625-verdin-nonwifi-dev.dtb \ + k3-am625-verdin-dsi-to-hdmi.dtbo +k3-am625-verdin-wifi-dahlia-dsi-to-hdmi-dtbs := k3-am625-verdin-wifi-dahlia.dtb \ + k3-am625-verdin-dsi-to-hdmi.dtbo +k3-am625-verdin-wifi-dev-dsi-to-hdmi-dtbs := k3-am625-verdin-wifi-dev.dtb \ + k3-am625-verdin-dsi-to-hdmi.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-beagleplay.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-beagleplay-csi2-ov5640.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-beagleplay-csi2-tevi-ov5640.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-phyboard-lyra-rdk.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-sk.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-tqma62xx-mba62xx.dtb +dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-dsi-to-hdmi.dtbo +dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-dahlia-dsi-to-hdmi.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-dahlia.dtb +dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-dev-dsi-to-hdmi.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-dev.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-ivy.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-mallow.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-yavia.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-zinnia.dtb +dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-dahlia-dsi-to-hdmi.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-dahlia.dtb +dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-dev-dsi-to-hdmi.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-dev.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-ivy.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-mallow.dtb diff --git a/arch/arm64/boot/dts/ti/k3-am625-verdin-dsi-to-hdmi.dtso b/arch/arm64/boot/dts/ti/k3-am625-verdin-dsi-to-hdmi.dtso new file mode 100644 index 000000000000..a219faf0dcc6 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am625-verdin-dsi-to-hdmi.dtso @@ -0,0 +1,94 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) Toradex + * + * Toradex DSI to HDMI Adapter on Verdin DSI_1 + * + * https://developer.toradex.com/hardware/accessories/add-ons/dsi-hdmi-adapter + */ + +/dts-v1/; +/plugin/; + +#include + +&{/} { + hdmi-connector { + compatible = "hdmi-connector"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm3_dsi_gpio>; + ddc-i2c-bus = <&main_i2c2>; + /* Verdin PWM_3_DSI (SODIMM 19) */ + hpd-gpios = <&main_gpio1 17 GPIO_ACTIVE_HIGH>; + type = "a"; + + port { + hdmi_connector_in: endpoint { + remote-endpoint = <&dsi_hdmi_bridge_out>; + }; + }; + }; +}; + +&dsi_bridge { + status = "okay"; +}; + +&dsi_bridge_ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + + dsi_bridge_out: endpoint { + remote-endpoint = <&dsi_hdmi_bridge_in>; + }; + }; +}; + +&dss { + status = "okay"; +}; + +/* Verdin PWM_3_DSI (SODIMM 19) repurposed as HDMI HPD GPIO */ +&epwm1 { + status = "disabled"; +}; + +/* Verdin I2C_1 */ +&main_i2c1 { + #address-cells = <1>; + #size-cells = <0>; + + hdmi@48 { + compatible = "lontium,lt8912b"; + reg = <0x48>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_dsi1_bkl_en>; + /* Verdin GPIO_10_DSI (SODIMM 21) */ + reset-gpios = <&main_gpio0 30 GPIO_ACTIVE_LOW>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + dsi_hdmi_bridge_in: endpoint { + data-lanes = <1 2 3 4>; + remote-endpoint = <&dsi_bridge_out>; + }; + }; + + port@1 { + reg = <1>; + + dsi_hdmi_bridge_out: endpoint { + remote-endpoint = <&hdmi_connector_in>; + }; + }; + }; + }; +}; From 2bdc0ea4e7304f6aa7e87089609fd902d9de7a2d Mon Sep 17 00:00:00 2001 From: Nora Schiffer Date: Tue, 7 Apr 2026 13:42:37 +0200 Subject: [PATCH 11/20] arm64: dts: ti: k3-j722s-main: use J722S compatibles for WIZ, gmii-sel and CPSW3G Update WIZ, gmii-sel and CPSW3G to use the J722S-specific compatible strings, enabling SGMII support. The fallback compatibles preserve compatibility of the updated Device Trees with older kernels. Signed-off-by: Nora Schiffer Link: https://patch.msgid.link/391f17ba7b0e9dcaa1fc8210114dfda7eb3c0467.1775559102.git.nora.schiffer@ew.tq-group.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-j722s-main.dtsi | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi index d1dbf1e24fbf..5a5b9a1bfd9e 100644 --- a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi @@ -18,7 +18,7 @@ serdes_refclk: clk-0 { &cbass_main { serdes_wiz0: phy@f000000 { - compatible = "ti,am64-wiz-10g"; + compatible = "ti,j722s-wiz-10g", "ti,am64-wiz-10g"; ranges = <0x0f000000 0x0 0x0f000000 0x00010000>; #address-cells = <1>; #size-cells = <1>; @@ -56,7 +56,7 @@ serdes0: serdes@f000000 { }; serdes_wiz1: phy@f010000 { - compatible = "ti,am64-wiz-10g"; + compatible = "ti,j722s-wiz-10g", "ti,am64-wiz-10g"; ranges = <0x0f010000 0x0 0x0f010000 0x00010000>; #address-cells = <1>; #size-cells = <1>; @@ -444,6 +444,14 @@ serdes_ln_ctrl: mux-controller@4080 { }; }; +&cpsw3g { + compatible = "ti,j722s-cpsw-nuss", "ti,am642-cpsw-nuss"; +}; + +&phy_gmii_sel { + compatible = "ti,j722s-phy-gmii-sel", "ti,am654-phy-gmii-sel"; +}; + &oc_sram { reg = <0x00 0x70000000 0x00 0x40000>; ranges = <0x00 0x00 0x70000000 0x40000>; From ff4427a465a018fedaadd607c8166588a28a79d1 Mon Sep 17 00:00:00 2001 From: Vitor Soares Date: Fri, 22 May 2026 17:11:05 +0100 Subject: [PATCH 12/20] arm64: dts: ti: k3-am62-verdin: Add Toradex DSI to LVDS adapter with 10.1" display Add a device tree overlay for the Toradex DSI to LVDS Adapter with the Toradex Capacitive Touch Display 10.1" LVDS. The adapter connects to the Verdin DSI_1 interface. It is based on the Texas Instruments SN65DSI84 DSI-to-LVDS bridge and drives a LogicTechno LT170410-2WHC 10.1" WXGA LVDS panel. Touch input is provided by an Atmel MaxTouch capacitive touch controller. Link: https://developer.toradex.com/hardware/accessories/add-ons/dsi-lvds-adapter Link: https://developer.toradex.com/hardware/accessories/displays/capacitive-touch-display-101inch-lvds Assisted-by: Claude:claude-sonnet-4.6 Signed-off-by: Vitor Soares Reviewed-by: Francesco Dolcini Link: https://patch.msgid.link/20260522161105.277519-14-ivitro@gmail.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/Makefile | 5 + ...in-dsi-to-lvds-panel-cap-touch-10inch.dtso | 124 ++++++++++++++++++ 2 files changed, 129 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am625-verdin-dsi-to-lvds-panel-cap-touch-10inch.dtso diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index 21db60cd19de..b2408f62c139 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -24,6 +24,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am625-phyboard-lyra-rdk.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-sk.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-tqma62xx-mba62xx.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-dsi-to-hdmi.dtbo +dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-dsi-to-lvds-panel-cap-touch-10inch.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-dahlia-dsi-to-hdmi.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-dahlia.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-dev-dsi-to-hdmi.dtb @@ -209,6 +210,9 @@ k3-am625-sk-csi2-ov5640-dtbs := k3-am625-sk.dtb \ k3-am625-sk-csi2-tevi-ov5640-dtbs := k3-am625-sk.dtb \ k3-am62x-sk-csi2-tevi-ov5640.dtbo k3-am625-sk-hdmi-audio-dtbs := k3-am625-sk.dtb k3-am62x-sk-hdmi-audio.dtbo +k3-am625-verdin-wifi-dev-dsi-to-lvds-panel-cap-touch-10inch-dtbs := \ + k3-am625-verdin-wifi-dev.dtb \ + k3-am625-verdin-dsi-to-lvds-panel-cap-touch-10inch.dtbo k3-am62-lp-sk-hdmi-audio-dtbs := k3-am62-lp-sk.dtb k3-am62x-sk-hdmi-audio.dtbo k3-am62-lp-sk-nand-dtbs := k3-am62-lp-sk.dtb k3-am62-lp-sk-nand.dtbo k3-am62a7-phyboard-lyra-disable-eth-phy-dtbs := k3-am62a7-phyboard-lyra-rdk.dtb \ @@ -310,6 +314,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \ k3-am625-sk-csi2-ov5640.dtb \ k3-am625-sk-csi2-tevi-ov5640.dtb \ k3-am625-sk-hdmi-audio.dtb \ + k3-am625-verdin-wifi-dev-dsi-to-lvds-panel-cap-touch-10inch.dtb \ k3-am62-lp-sk-hdmi-audio.dtb \ k3-am62-lp-sk-nand.dtb \ k3-am62a7-phyboard-lyra-disable-eth-phy.dtb \ diff --git a/arch/arm64/boot/dts/ti/k3-am625-verdin-dsi-to-lvds-panel-cap-touch-10inch.dtso b/arch/arm64/boot/dts/ti/k3-am625-verdin-dsi-to-lvds-panel-cap-touch-10inch.dtso new file mode 100644 index 000000000000..deb74ecc5eb4 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am625-verdin-dsi-to-lvds-panel-cap-touch-10inch.dtso @@ -0,0 +1,124 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) Toradex + * + * Toradex DSI to LVDS Adapter on Verdin DSI_1 with Capacitive Touch Display 10.1" + * Used on Dahlia (X17) and Development Board (X48) that expose DSI_1 via an + * Samtec LSS-130 connector. + * + * https://developer.toradex.com/hardware/accessories/displays/capacitive-touch-display-101inch-lvds + * https://www.toradex.com/accessories/capacitive-touch-display-10.1-inch-lvds + * https://developer.toradex.com/hardware/accessories/add-ons/dsi-lvds-adapter + * https://www.toradex.com/accessories/verdin-dsi-to-lvds-adapter + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include + +&{/} { + backlight_pwm3: backlight-pwm3 { + compatible = "pwm-backlight"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2s_2_d_out_gpio>; + brightness-levels = <0 45 63 88 119 158 203 255>; + default-brightness-level = <4>; + /* Verdin I2S_2_D_OUT as GPIO (SODIMM 46) */ + enable-gpios = <&main_gpio0 34 GPIO_ACTIVE_HIGH>; + power-supply = <®_3v3>; + /* Verdin PWM_3_DSI (SODIMM 19) */ + pwms = <&epwm1 0 6666667 PWM_POLARITY_INVERTED>; + }; + + panel-lvds-bridge { + compatible = "logictechno,lt170410-2whc"; + backlight = <&backlight_pwm3>; + power-supply = <®_3v3_dsi>; + + port { + panel_lvds_bridge_in: endpoint { + remote-endpoint = <&dsi_lvds_bridge_out>; + }; + }; + }; + + reg_3v3_dsi: regulator-3v3-dsi { + compatible = "regulator-fixed"; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "+V3.3_DSI"; + }; +}; + +&dsi_bridge { + status = "okay"; +}; + +&dsi_bridge_ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + + dsi_bridge_out: endpoint { + remote-endpoint = <&dsi_lvds_bridge_in>; + }; + }; +}; + +&dss { + status = "okay"; +}; + +/* Verdin I2C_1 */ +&main_i2c1 { + #address-cells = <1>; + #size-cells = <0>; + + bridge@2c { + compatible = "ti,sn65dsi84"; + reg = <0x2c>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_dsi1_bkl_en>; + /* Verdin GPIO_10_DSI (SODIMM 21) - DSI_1_BKL_EN */ + enable-gpios = <&main_gpio0 30 GPIO_ACTIVE_HIGH>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + dsi_lvds_bridge_in: endpoint { + remote-endpoint = <&dsi_bridge_out>; + data-lanes = <1 2 3 4>; + }; + }; + + port@2 { + reg = <2>; + + dsi_lvds_bridge_out: endpoint { + remote-endpoint = <&panel_lvds_bridge_in>; + }; + }; + }; + }; + + touchscreen@4a { + compatible = "atmel,maxtouch"; + reg = <0x4a>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_dsi1_int>, <&pinctrl_i2s_2_bclk_gpio>; + /* Verdin GPIO_9_DSI (SODIMM 17) - TOUCH_INT# */ + interrupt-parent = <&main_gpio1>; + interrupts = <49 IRQ_TYPE_EDGE_FALLING>; + /* Verdin I2S_2_BCLK (SODIMM 42) - TOUCH_RESET# */ + reset-gpios = <&main_gpio0 35 GPIO_ACTIVE_LOW>; + }; +}; From 38d01a245e66c30e7372a4a67d310fbcd8319649 Mon Sep 17 00:00:00 2001 From: Vitor Soares Date: Fri, 22 May 2026 17:11:06 +0100 Subject: [PATCH 13/20] arm64: dts: ti: k3-am62-verdin: Add Toradex Capacitive Touch Display 10.1" LVDS Add a device tree overlay for the Toradex Capacitive Touch Display 10.1" LVDS connected via Verdin AM62 OLDI on carrier boards exposing LVDS interface (e.g., Mallow). The panel is a LogicTechno LT170410-2WHC 10.1" WXGA IPS LCD and the touch input is provided by an Atmel MaxTouch capacitive touch controller. Link: https://developer.toradex.com/hardware/accessories/displays/capacitive-touch-display-101inch-lvds Assisted-by: Claude:claude-sonnet-4.6 Signed-off-by: Vitor Soares Reviewed-by: Francesco Dolcini Link: https://patch.msgid.link/20260522161105.277519-15-ivitro@gmail.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/Makefile | 5 + ...25-verdin-panel-cap-touch-10inch-lvds.dtso | 120 ++++++++++++++++++ 2 files changed, 125 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am625-verdin-panel-cap-touch-10inch-lvds.dtso diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index b2408f62c139..867c05b675d1 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -33,6 +33,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-ivy.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-mallow.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-yavia.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-zinnia.dtb +dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-panel-cap-touch-10inch-lvds.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-dahlia-dsi-to-hdmi.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-dahlia.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-dev-dsi-to-hdmi.dtb @@ -213,6 +214,9 @@ k3-am625-sk-hdmi-audio-dtbs := k3-am625-sk.dtb k3-am62x-sk-hdmi-audio.dtbo k3-am625-verdin-wifi-dev-dsi-to-lvds-panel-cap-touch-10inch-dtbs := \ k3-am625-verdin-wifi-dev.dtb \ k3-am625-verdin-dsi-to-lvds-panel-cap-touch-10inch.dtbo +k3-am625-verdin-wifi-mallow-panel-cap-touch-10inch-lvds-dtbs := \ + k3-am625-verdin-wifi-mallow.dtb \ + k3-am625-verdin-panel-cap-touch-10inch-lvds.dtbo k3-am62-lp-sk-hdmi-audio-dtbs := k3-am62-lp-sk.dtb k3-am62x-sk-hdmi-audio.dtbo k3-am62-lp-sk-nand-dtbs := k3-am62-lp-sk.dtb k3-am62-lp-sk-nand.dtbo k3-am62a7-phyboard-lyra-disable-eth-phy-dtbs := k3-am62a7-phyboard-lyra-rdk.dtb \ @@ -315,6 +319,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \ k3-am625-sk-csi2-tevi-ov5640.dtb \ k3-am625-sk-hdmi-audio.dtb \ k3-am625-verdin-wifi-dev-dsi-to-lvds-panel-cap-touch-10inch.dtb \ + k3-am625-verdin-wifi-mallow-panel-cap-touch-10inch-lvds.dtb \ k3-am62-lp-sk-hdmi-audio.dtb \ k3-am62-lp-sk-nand.dtb \ k3-am62a7-phyboard-lyra-disable-eth-phy.dtb \ diff --git a/arch/arm64/boot/dts/ti/k3-am625-verdin-panel-cap-touch-10inch-lvds.dtso b/arch/arm64/boot/dts/ti/k3-am625-verdin-panel-cap-touch-10inch-lvds.dtso new file mode 100644 index 000000000000..f83366b11bdb --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am625-verdin-panel-cap-touch-10inch-lvds.dtso @@ -0,0 +1,120 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) Toradex + * + * Toradex Capacitive Touch Display 10.1" connected via Verdin AM62 OLDI + * on carrier boards with a Toradex standard LVDS display connector + * (e.g., Mallow). + * + * https://developer.toradex.com/hardware/accessories/displays/capacitive-touch-display-101inch-lvds + * https://www.toradex.com/accessories/capacitive-touch-display-10.1-inch-lvds + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include +#include "k3-pinctrl.h" + +&{/} { + backlight_pwm2: backlight-pwm2 { + compatible = "pwm-backlight"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2s_2_d_out_gpio>; + brightness-levels = <0 45 63 88 119 158 203 255>; + default-brightness-level = <4>; + /* Verdin I2S_2_D_OUT as GPIO (SODIMM 46) */ + enable-gpios = <&main_gpio0 34 GPIO_ACTIVE_HIGH>; + /* Verdin PWM_2 (SODIMM 16) */ + pwms = <&epwm0 1 6666667 PWM_POLARITY_INVERTED>; + }; + + panel-lvds-native { + compatible = "logictechno,lt170410-2whc"; + backlight = <&backlight_pwm2>; + power-supply = <®_3v3_lvds>; + + port { + panel_lvds_native_in: endpoint { + remote-endpoint = <&oldi0_out>; + }; + }; + }; + + reg_3v3_lvds: regulator-3v3-lvds { + compatible = "regulator-fixed"; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "+V3.3_LVDS"; + }; +}; + +&dss { + status = "okay"; +}; + +&dss_ports { + #address-cells = <1>; + #size-cells = <0>; + + /* DSS VP1: internal DPI output to OLDIx */ + port@0 { + reg = <0>; + + dss0_out: endpoint { + remote-endpoint = <&oldi0_in>; + }; + }; +}; + +/* Verdin I2C_2_DSI */ +&main_i2c2 { + #address-cells = <1>; + #size-cells = <0>; + + touchscreen@4a { + compatible = "atmel,maxtouch"; + reg = <0x4a>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2s_2_d_in_gpio>, <&pinctrl_i2s_2_sync_gpio>; + /* Verdin I2S_2_SYNC as GPIO (SODIMM 44) */ + interrupt-parent = <&main_gpio0>; + interrupts = <37 IRQ_TYPE_EDGE_FALLING>; + /* Verdin I2S_2_D_IN as GPIO (SODIMM 48) */ + reset-gpios = <&main_gpio0 33 GPIO_ACTIVE_LOW>; + }; +}; + +&main_pmx0 { + /* Mallow Touch RST */ + pinctrl_i2s_2_d_in_gpio: main-gpio0-33-default-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x0088, PIN_INPUT, 7) /* (L24) GPMC0_OEn_REn.GPIO0_33 */ /* SODIMM 48 */ + >; + }; + + /* Mallow Touch INT# */ + pinctrl_i2s_2_sync_gpio: main-gpio0-37-default-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x0098, PIN_INPUT, 7) /* (U23) GPMC0_WAIT0.GPIO0_37 */ /* SODIMM 44 */ + >; + }; +}; + +&oldi0 { + status = "okay"; +}; + +&oldi0_port0 { + oldi0_in: endpoint { + remote-endpoint = <&dss0_out>; + }; +}; + +&oldi0_port1 { + oldi0_out: endpoint { + remote-endpoint = <&panel_lvds_native_in>; + }; +}; From 8e76e1539c440c3070e4004bd20392588f870010 Mon Sep 17 00:00:00 2001 From: Vitor Soares Date: Fri, 22 May 2026 17:11:09 +0100 Subject: [PATCH 14/20] arm64: dts: ti: k3-am62-verdin: Add Toradex Capacitive Touch Display 10.1" DSI Add a device tree overlay for the Toradex Capacitive Touch Display 10.1" on the Verdin DSI_1 interface. The display features an internal Texas Instruments SN65DSI83 DSI-to-LVDS bridge driving a Riverdi RVT101HVLNWC00 10.1" WXGA (1280x800) IPS TFT LCD panel. The touch input is provided by an Ilitek ILI2132 capacitive touch controller. The overlay is also combined with the Verdin AM62 Dahlia carrier board device trees to provide ready-to-use DTBs in both WiFi and non-Wifi SoM variants. Link: https://developer.toradex.com/hardware/accessories/displays/capacitive-touch-display-101inch-dsi Link: https://developer.toradex.com/hardware/accessories/add-ons/dsi-display-adapter/ Assisted-by: Claude:claude-sonnet-4.6 Signed-off-by: Vitor Soares Reviewed-by: Francesco Dolcini Link: https://patch.msgid.link/20260522161105.277519-18-ivitro@gmail.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/Makefile | 9 ++ ...625-verdin-panel-cap-touch-10inch-dsi.dtso | 132 ++++++++++++++++++ 2 files changed, 141 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am625-verdin-panel-cap-touch-10inch-dsi.dtso diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index 867c05b675d1..dc397bc693ac 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -11,10 +11,16 @@ # Boards with AM62x SoC k3-am625-verdin-nonwifi-dahlia-dsi-to-hdmi-dtbs := k3-am625-verdin-nonwifi-dahlia.dtb \ k3-am625-verdin-dsi-to-hdmi.dtbo +k3-am625-verdin-nonwifi-dahlia-panel-cap-touch-10inch-dsi-dtbs := \ + k3-am625-verdin-nonwifi-dahlia.dtb \ + k3-am625-verdin-panel-cap-touch-10inch-dsi.dtbo k3-am625-verdin-nonwifi-dev-dsi-to-hdmi-dtbs := k3-am625-verdin-nonwifi-dev.dtb \ k3-am625-verdin-dsi-to-hdmi.dtbo k3-am625-verdin-wifi-dahlia-dsi-to-hdmi-dtbs := k3-am625-verdin-wifi-dahlia.dtb \ k3-am625-verdin-dsi-to-hdmi.dtbo +k3-am625-verdin-wifi-dahlia-panel-cap-touch-10inch-dsi-dtbs := \ + k3-am625-verdin-wifi-dahlia.dtb \ + k3-am625-verdin-panel-cap-touch-10inch-dsi.dtbo k3-am625-verdin-wifi-dev-dsi-to-hdmi-dtbs := k3-am625-verdin-wifi-dev.dtb \ k3-am625-verdin-dsi-to-hdmi.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-beagleplay.dtb @@ -26,6 +32,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am625-tqma62xx-mba62xx.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-dsi-to-hdmi.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-dsi-to-lvds-panel-cap-touch-10inch.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-dahlia-dsi-to-hdmi.dtb +dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-dahlia-panel-cap-touch-10inch-dsi.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-dahlia.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-dev-dsi-to-hdmi.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-dev.dtb @@ -33,8 +40,10 @@ dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-ivy.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-mallow.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-yavia.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-zinnia.dtb +dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-panel-cap-touch-10inch-dsi.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-panel-cap-touch-10inch-lvds.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-dahlia-dsi-to-hdmi.dtb +dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-dahlia-panel-cap-touch-10inch-dsi.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-dahlia.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-dev-dsi-to-hdmi.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-dev.dtb diff --git a/arch/arm64/boot/dts/ti/k3-am625-verdin-panel-cap-touch-10inch-dsi.dtso b/arch/arm64/boot/dts/ti/k3-am625-verdin-panel-cap-touch-10inch-dsi.dtso new file mode 100644 index 000000000000..ed66feec9462 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am625-verdin-panel-cap-touch-10inch-dsi.dtso @@ -0,0 +1,132 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) Toradex + * + * Toradex Capacitive Touch Display 10.1" on Verdin DSI_1. + * On Dahlia (X17) and Development Board (X48), DSI_1 is exposed via a + * Samtec LSS-130 connector and requires the Toradex DSI Display Adapter + * to convert to FFC/FPC connector. + * + * https://developer.toradex.com/hardware/accessories/displays/capacitive-touch-display-101inch-dsi + * https://www.toradex.com/accessories/capacitive-touch-display-10.1-inch-dsi + * https://developer.toradex.com/hardware/accessories/add-ons/dsi-display-adapter + * https://www.toradex.com/accessories/verdin-dsi-display-adapter + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include + +&{/} { + backlight_pwm3: backlight-pwm3 { + compatible = "pwm-backlight"; + brightness-levels = <0 45 63 88 119 158 203 255>; + default-brightness-level = <4>; + power-supply = <®_3v3>; + /* Verdin PWM_3_DSI (SODIMM 19) - PWM_3_DSI_LVDS */ + pwms = <&epwm1 0 6666667 0>; + }; + + panel-lvds-bridge { + compatible = "riverdi,rvt101hvlnwc00", "panel-lvds"; + backlight = <&backlight_pwm3>; + data-mapping = "vesa-24"; + height-mm = <136>; + width-mm = <217>; + + panel-timing { + clock-frequency = <72400000>; + de-active = <1>; + hactive = <1280>; + hback-porch = <88 88 88>; + hfront-porch = <12 72 132>; + hsync-active = <0>; + hsync-len = <1 5 40>; + pixelclk-active = <1>; + vactive = <800>; + vback-porch = <23 23 23>; + vfront-porch = <1 15 49>; + vsync-active = <0>; + vsync-len = <1 10 20>; + }; + + port { + panel_lvds_bridge_in: endpoint { + remote-endpoint = <&dsi_lvds_bridge_out>; + }; + }; + }; +}; + +&dsi_bridge { + status = "okay"; +}; + +&dsi_bridge_ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + + dsi_bridge_out: endpoint { + remote-endpoint = <&dsi_lvds_bridge_in>; + }; + }; +}; + +&dss { + status = "okay"; +}; + +/* Verdin I2C_2_DSI */ +&main_i2c2 { + #address-cells = <1>; + #size-cells = <0>; + + bridge@2c { + compatible = "ti,sn65dsi83"; + reg = <0x2c>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_dsi1_bkl_en>; + /* Verdin GPIO_10_DSI (SODIMM 21) - DSI_1_BKL_EN */ + enable-gpios = <&main_gpio0 30 GPIO_ACTIVE_HIGH>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + dsi_lvds_bridge_in: endpoint { + remote-endpoint = <&dsi_bridge_out>; + data-lanes = <1 2 3 4>; + }; + }; + + port@2 { + reg = <2>; + + dsi_lvds_bridge_out: endpoint { + remote-endpoint = <&panel_lvds_bridge_in>; + }; + }; + }; + }; + + touchscreen@41 { + compatible = "ilitek,ili2132"; + reg = <0x41>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_dsi1_int>, <&pinctrl_i2s_2_bclk_gpio>; + /* Verdin GPIO_9_DSI (SODIMM 17) - TOUCH_INT# */ + interrupt-parent = <&main_gpio1>; + interrupts = <49 IRQ_TYPE_EDGE_RISING>; + /* Verdin I2S_2_BCLK (SODIMM 42) - TOUCH_RESET# */ + reset-gpios = <&main_gpio0 35 GPIO_ACTIVE_LOW>; + }; +}; From 8a637725ad7cb29434bba0deb6b530d3116429b3 Mon Sep 17 00:00:00 2001 From: Vitor Soares Date: Fri, 22 May 2026 17:11:10 +0100 Subject: [PATCH 15/20] arm64: dts: ti: k3-am62-verdin: Add Toradex Capacitive Touch Display 7" DSI Add a device tree overlay for the Toradex Capacitive Touch Display 7" DSI on the Verdin DSI_1 interface. The display features an internal Texas Instruments SN65DSI83 DSI-to-LVDS bridge driving a Riverdi RVT70HSLNWCA0 7" WSVGA IPS TFT LCD panel. The touch input is provided by an Ilitek ILI2132 capacitive touch controller. Link: https://developer.toradex.com/hardware/accessories/displays/capacitive-touch-display-7inch-dsi Link: https://developer.toradex.com/hardware/accessories/add-ons/dsi-display-adapter/ Assisted-by: Claude:claude-sonnet-4.6 Signed-off-by: Vitor Soares Reviewed-by: Francesco Dolcini Link: https://patch.msgid.link/20260522161105.277519-19-ivitro@gmail.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/Makefile | 5 + ...m625-verdin-panel-cap-touch-7inch-dsi.dtso | 132 ++++++++++++++++++ 2 files changed, 137 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am625-verdin-panel-cap-touch-7inch-dsi.dtso diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index dc397bc693ac..14898f8ab0e2 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -42,6 +42,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-yavia.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-zinnia.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-panel-cap-touch-10inch-dsi.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-panel-cap-touch-10inch-lvds.dtbo +dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-panel-cap-touch-7inch-dsi.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-dahlia-dsi-to-hdmi.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-dahlia-panel-cap-touch-10inch-dsi.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-dahlia.dtb @@ -223,6 +224,9 @@ k3-am625-sk-hdmi-audio-dtbs := k3-am625-sk.dtb k3-am62x-sk-hdmi-audio.dtbo k3-am625-verdin-wifi-dev-dsi-to-lvds-panel-cap-touch-10inch-dtbs := \ k3-am625-verdin-wifi-dev.dtb \ k3-am625-verdin-dsi-to-lvds-panel-cap-touch-10inch.dtbo +k3-am625-verdin-wifi-dev-panel-cap-touch-7inch-dsi-dtbs := \ + k3-am625-verdin-wifi-dev.dtb \ + k3-am625-verdin-panel-cap-touch-7inch-dsi.dtbo k3-am625-verdin-wifi-mallow-panel-cap-touch-10inch-lvds-dtbs := \ k3-am625-verdin-wifi-mallow.dtb \ k3-am625-verdin-panel-cap-touch-10inch-lvds.dtbo @@ -328,6 +332,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \ k3-am625-sk-csi2-tevi-ov5640.dtb \ k3-am625-sk-hdmi-audio.dtb \ k3-am625-verdin-wifi-dev-dsi-to-lvds-panel-cap-touch-10inch.dtb \ + k3-am625-verdin-wifi-dev-panel-cap-touch-7inch-dsi.dtb \ k3-am625-verdin-wifi-mallow-panel-cap-touch-10inch-lvds.dtb \ k3-am62-lp-sk-hdmi-audio.dtb \ k3-am62-lp-sk-nand.dtb \ diff --git a/arch/arm64/boot/dts/ti/k3-am625-verdin-panel-cap-touch-7inch-dsi.dtso b/arch/arm64/boot/dts/ti/k3-am625-verdin-panel-cap-touch-7inch-dsi.dtso new file mode 100644 index 000000000000..1f44133f9ca6 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am625-verdin-panel-cap-touch-7inch-dsi.dtso @@ -0,0 +1,132 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) Toradex + * + * Toradex Capacitive Touch Display 7" on Verdin DSI_1. + * On Dahlia (X17) and Development Board (X48), DSI_1 is exposed via a + * Samtec LSS-130 connector and requires the Toradex DSI Display Adapter + * to convert to FFC/FPC connector. + * + * https://developer.toradex.com/hardware/accessories/displays/capacitive-touch-display-7inch-dsi + * https://www.toradex.com/accessories/capacitive-touch-display-7-inch-dsi + * https://developer.toradex.com/hardware/accessories/add-ons/dsi-display-adapter + * https://www.toradex.com/accessories/verdin-dsi-display-adapter + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include + +&{/} { + backlight_pwm3: backlight-pwm3 { + compatible = "pwm-backlight"; + brightness-levels = <0 45 63 88 119 158 203 255>; + default-brightness-level = <4>; + power-supply = <®_3v3>; + /* Verdin PWM_3_DSI (SODIMM 19) - PWM_3_DSI_LVDS */ + pwms = <&epwm1 0 6666667 0>; + }; + + panel-lvds-bridge { + compatible = "riverdi,rvt70hslnwca0", "panel-lvds"; + backlight = <&backlight_pwm3>; + data-mapping = "vesa-24"; + height-mm = <86>; + width-mm = <154>; + + panel-timing { + clock-frequency = <51200000>; + de-active = <1>; + hactive = <1024>; + hback-porch = <160 160 160>; + hfront-porch = <16 160 216>; + hsync-active = <0>; + hsync-len = <1 5 140>; + pixelclk-active = <1>; + vactive = <600>; + vback-porch = <23 23 23>; + vfront-porch = <1 12 126>; + vsync-active = <0>; + vsync-len = <1 10 20>; + }; + + port { + panel_lvds_bridge_in: endpoint { + remote-endpoint = <&dsi_lvds_bridge_out>; + }; + }; + }; +}; + +&dsi_bridge { + status = "okay"; +}; + +&dsi_bridge_ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + + dsi_bridge_out: endpoint { + remote-endpoint = <&dsi_lvds_bridge_in>; + }; + }; +}; + +&dss { + status = "okay"; +}; + +/* Verdin I2C_2_DSI */ +&main_i2c2 { + #address-cells = <1>; + #size-cells = <0>; + + bridge@2c { + compatible = "ti,sn65dsi83"; + reg = <0x2c>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_dsi1_bkl_en>; + /* Verdin GPIO_10_DSI (SODIMM 21) - DSI_1_BKL_EN */ + enable-gpios = <&main_gpio0 30 GPIO_ACTIVE_HIGH>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + dsi_lvds_bridge_in: endpoint { + remote-endpoint = <&dsi_bridge_out>; + data-lanes = <1 2 3 4>; + }; + }; + + port@2 { + reg = <2>; + + dsi_lvds_bridge_out: endpoint { + remote-endpoint = <&panel_lvds_bridge_in>; + }; + }; + }; + }; + + touchscreen@41 { + compatible = "ilitek,ili2132"; + reg = <0x41>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_dsi1_int>, <&pinctrl_i2s_2_bclk_gpio>; + /* Verdin GPIO_9_DSI (SODIMM 17) - TOUCH_INT# */ + interrupt-parent = <&main_gpio1>; + interrupts = <49 IRQ_TYPE_EDGE_RISING>; + /* Verdin I2S_2_BCLK (SODIMM 42) - TOUCH_RESET# */ + reset-gpios = <&main_gpio0 35 GPIO_ACTIVE_LOW>; + }; +}; From a8891ba79990aded756e8bb92ebb690a4da6dab2 Mon Sep 17 00:00:00 2001 From: Vitor Soares Date: Fri, 22 May 2026 17:11:11 +0100 Subject: [PATCH 16/20] arm64: dts: ti: k3-am62-verdin: Add NAU8822 Bridge Tied Load Add a device tree overlay enabling Bridge Tied Load (BTL) mode on the Nuvoton NAU8822 audio codec present on the Verdin Development Board. In BTL mode, the two loudspeaker outputs are bridged to deliver higher output power on the X28 speaker connector. Assisted-by: Claude:claude-sonnet-4.6 Signed-off-by: Vitor Soares Reviewed-by: Francesco Dolcini Link: https://patch.msgid.link/20260522161105.277519-20-ivitro@gmail.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/Makefile | 4 ++++ .../dts/ti/k3-am625-verdin-dev-nau8822-btl.dtso | 14 ++++++++++++++ 2 files changed, 18 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am625-verdin-dev-nau8822-btl.dtso diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index 14898f8ab0e2..a1083c0b2502 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -29,6 +29,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am625-beagleplay-csi2-tevi-ov5640.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-phyboard-lyra-rdk.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-sk.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-tqma62xx-mba62xx.dtb +dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-dev-nau8822-btl.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-dsi-to-hdmi.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-dsi-to-lvds-panel-cap-touch-10inch.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-dahlia-dsi-to-hdmi.dtb @@ -224,6 +225,8 @@ k3-am625-sk-hdmi-audio-dtbs := k3-am625-sk.dtb k3-am62x-sk-hdmi-audio.dtbo k3-am625-verdin-wifi-dev-dsi-to-lvds-panel-cap-touch-10inch-dtbs := \ k3-am625-verdin-wifi-dev.dtb \ k3-am625-verdin-dsi-to-lvds-panel-cap-touch-10inch.dtbo +k3-am625-verdin-wifi-dev-nau8822-btl-dtbs := k3-am625-verdin-wifi-dev.dtb \ + k3-am625-verdin-dev-nau8822-btl.dtbo k3-am625-verdin-wifi-dev-panel-cap-touch-7inch-dsi-dtbs := \ k3-am625-verdin-wifi-dev.dtb \ k3-am625-verdin-panel-cap-touch-7inch-dsi.dtbo @@ -332,6 +335,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \ k3-am625-sk-csi2-tevi-ov5640.dtb \ k3-am625-sk-hdmi-audio.dtb \ k3-am625-verdin-wifi-dev-dsi-to-lvds-panel-cap-touch-10inch.dtb \ + k3-am625-verdin-wifi-dev-nau8822-btl.dtb \ k3-am625-verdin-wifi-dev-panel-cap-touch-7inch-dsi.dtb \ k3-am625-verdin-wifi-mallow-panel-cap-touch-10inch-lvds.dtb \ k3-am62-lp-sk-hdmi-audio.dtb \ diff --git a/arch/arm64/boot/dts/ti/k3-am625-verdin-dev-nau8822-btl.dtso b/arch/arm64/boot/dts/ti/k3-am625-verdin-dev-nau8822-btl.dtso new file mode 100644 index 000000000000..e4b662519a6b --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am625-verdin-dev-nau8822-btl.dtso @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) Toradex + * + * Enable Bridge Tied Load (BTL) speaker mode on the Verdin Development Board, + * combining the two loudspeaker outputs for higher output power. + */ + +/dts-v1/; +/plugin/; + +&nau8822_1a { + nuvoton,spk-btl; +}; From ca61bcec3e8a52ad2bf8b02f9244df1d47447ffa Mon Sep 17 00:00:00 2001 From: Vitor Soares Date: Fri, 22 May 2026 17:11:12 +0100 Subject: [PATCH 17/20] arm64: dts: ti: k3-am62-verdin: Reserve UART_4 for Cortex-M4F Add a device tree overlay reserving AM62 MCU_UART0 (Verdin UART_4) for use by the Cortex-M4F co-processor as its debug UART. Assisted-by: Claude:claude-sonnet-4.6 Signed-off-by: Vitor Soares Reviewed-by: Francesco Dolcini Link: https://patch.msgid.link/20260522161105.277519-21-ivitro@gmail.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/Makefile | 4 ++++ .../boot/dts/ti/k3-am625-verdin-uart4-mcu.dtso | 13 +++++++++++++ 2 files changed, 17 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am625-verdin-uart4-mcu.dtso diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index a1083c0b2502..31c9bc1d48b1 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -44,6 +44,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-zinnia.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-panel-cap-touch-10inch-dsi.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-panel-cap-touch-10inch-lvds.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-panel-cap-touch-7inch-dsi.dtbo +dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-uart4-mcu.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-dahlia-dsi-to-hdmi.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-dahlia-panel-cap-touch-10inch-dsi.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-dahlia.dtb @@ -230,6 +231,8 @@ k3-am625-verdin-wifi-dev-nau8822-btl-dtbs := k3-am625-verdin-wifi-dev.dtb \ k3-am625-verdin-wifi-dev-panel-cap-touch-7inch-dsi-dtbs := \ k3-am625-verdin-wifi-dev.dtb \ k3-am625-verdin-panel-cap-touch-7inch-dsi.dtbo +k3-am625-verdin-wifi-dev-uart4-mcu-dtbs := k3-am625-verdin-wifi-dev.dtb \ + k3-am625-verdin-uart4-mcu.dtbo k3-am625-verdin-wifi-mallow-panel-cap-touch-10inch-lvds-dtbs := \ k3-am625-verdin-wifi-mallow.dtb \ k3-am625-verdin-panel-cap-touch-10inch-lvds.dtbo @@ -337,6 +340,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \ k3-am625-verdin-wifi-dev-dsi-to-lvds-panel-cap-touch-10inch.dtb \ k3-am625-verdin-wifi-dev-nau8822-btl.dtb \ k3-am625-verdin-wifi-dev-panel-cap-touch-7inch-dsi.dtb \ + k3-am625-verdin-wifi-dev-uart4-mcu.dtb \ k3-am625-verdin-wifi-mallow-panel-cap-touch-10inch-lvds.dtb \ k3-am62-lp-sk-hdmi-audio.dtb \ k3-am62-lp-sk-nand.dtb \ diff --git a/arch/arm64/boot/dts/ti/k3-am625-verdin-uart4-mcu.dtso b/arch/arm64/boot/dts/ti/k3-am625-verdin-uart4-mcu.dtso new file mode 100644 index 000000000000..e263809cdf74 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am625-verdin-uart4-mcu.dtso @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) Toradex + * + * Verdin AM62 Cortex-M4F debug UART + */ + +/dts-v1/; +/plugin/; + +&mcu_uart0 { + status = "reserved"; +}; From f63de43a0d6f13874b6c20af0ca4726f7a5327f8 Mon Sep 17 00:00:00 2001 From: Vitor Soares Date: Fri, 22 May 2026 17:11:13 +0100 Subject: [PATCH 18/20] arm64: dts: ti: k3-am62-verdin: Add Toradex OV5640 CSI Cameras Add device tree overlays for the Toradex OV5640 CSI Cameras on Verdin CSI_1. Two variants are supported: the current CSI Camera Set 5MP OV5640 with a 27 MHz oscillator and the legacy CSI Camera Module 5MP OV5640 with a 24 MHz oscillator. Link: https://developer.toradex.com/hardware/accessories/cameras/csi-camera-module-5mp-ov5640-arducam Link: https://developer.toradex.com/hardware/legacy-products/other/csi-camera-module-5mp-ov5640/ Assisted-by: Claude:claude-sonnet-4.6 Signed-off-by: Vitor Soares Reviewed-by: Francesco Dolcini Link: https://patch.msgid.link/20260522161105.277519-22-ivitro@gmail.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/Makefile | 8 +++ .../dts/ti/k3-am625-verdin-ov5640-24mhz.dtso | 17 +++++ .../boot/dts/ti/k3-am625-verdin-ov5640.dtsi | 71 +++++++++++++++++++ .../boot/dts/ti/k3-am625-verdin-ov5640.dtso | 18 +++++ 4 files changed, 114 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am625-verdin-ov5640-24mhz.dtso create mode 100644 arch/arm64/boot/dts/ti/k3-am625-verdin-ov5640.dtsi create mode 100644 arch/arm64/boot/dts/ti/k3-am625-verdin-ov5640.dtso diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index 31c9bc1d48b1..60844951c9ce 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -41,6 +41,8 @@ dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-ivy.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-mallow.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-yavia.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-zinnia.dtb +dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-ov5640-24mhz.dtbo +dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-ov5640.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-panel-cap-touch-10inch-dsi.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-panel-cap-touch-10inch-lvds.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-panel-cap-touch-7inch-dsi.dtbo @@ -228,6 +230,10 @@ k3-am625-verdin-wifi-dev-dsi-to-lvds-panel-cap-touch-10inch-dtbs := \ k3-am625-verdin-dsi-to-lvds-panel-cap-touch-10inch.dtbo k3-am625-verdin-wifi-dev-nau8822-btl-dtbs := k3-am625-verdin-wifi-dev.dtb \ k3-am625-verdin-dev-nau8822-btl.dtbo +k3-am625-verdin-wifi-dev-ov5640-24mhz-dtbs := k3-am625-verdin-wifi-dev.dtb \ + k3-am625-verdin-ov5640-24mhz.dtbo +k3-am625-verdin-wifi-dev-ov5640-dtbs := k3-am625-verdin-wifi-dev.dtb \ + k3-am625-verdin-ov5640.dtbo k3-am625-verdin-wifi-dev-panel-cap-touch-7inch-dsi-dtbs := \ k3-am625-verdin-wifi-dev.dtb \ k3-am625-verdin-panel-cap-touch-7inch-dsi.dtbo @@ -339,6 +345,8 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \ k3-am625-sk-hdmi-audio.dtb \ k3-am625-verdin-wifi-dev-dsi-to-lvds-panel-cap-touch-10inch.dtb \ k3-am625-verdin-wifi-dev-nau8822-btl.dtb \ + k3-am625-verdin-wifi-dev-ov5640-24mhz.dtb \ + k3-am625-verdin-wifi-dev-ov5640.dtb \ k3-am625-verdin-wifi-dev-panel-cap-touch-7inch-dsi.dtb \ k3-am625-verdin-wifi-dev-uart4-mcu.dtb \ k3-am625-verdin-wifi-mallow-panel-cap-touch-10inch-lvds.dtb \ diff --git a/arch/arm64/boot/dts/ti/k3-am625-verdin-ov5640-24mhz.dtso b/arch/arm64/boot/dts/ti/k3-am625-verdin-ov5640-24mhz.dtso new file mode 100644 index 000000000000..7089336fa5b4 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am625-verdin-ov5640-24mhz.dtso @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) Toradex + * + * Toradex CSI Camera Module 5MP OV5640 on Verdin CSI_1. + * + * https://developer.toradex.com/hardware/legacy-products/other/csi-camera-module-5mp-ov5640/ + */ + +/dts-v1/; +/plugin/; + +#include "k3-am625-verdin-ov5640.dtsi" + +&clk_ov5640_osc { + clock-frequency = <24000000>; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am625-verdin-ov5640.dtsi b/arch/arm64/boot/dts/ti/k3-am625-verdin-ov5640.dtsi new file mode 100644 index 000000000000..eb3df9d85517 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am625-verdin-ov5640.dtsi @@ -0,0 +1,71 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) Toradex + * + * Common device tree include for Toradex OV5640 CSI camera on Verdin CSI_1. + */ + +#include + +&{/} { + clk_ov5640_osc: ov5640-xclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + }; + + regulator_camera: regulator-camera { + compatible = "regulator-fixed"; + /* Verdin GPIO_8_CSI (SODIMM 222) - CAM_1_CON_PWRCTRL */ + gpio = <&main_gpio0 42 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-name = "V_CSI"; + startup-delay-us = <5000>; + }; +}; + +&csi0_port0 { + status = "okay"; + + csi2rx0_in_sensor: endpoint { + remote-endpoint = <&csi2_cam0>; + bus-type = <4>; /* CSI2 DPHY */ + clock-lanes = <0>; + data-lanes = <1 2>; + }; +}; + +&dphy0 { + status = "okay"; +}; + +&main_i2c3 { + #address-cells = <1>; + #size-cells = <0>; + + camera@3c { + compatible = "ovti,ov5640"; + reg = <0x3c>; + + clocks = <&clk_ov5640_osc>; + clock-names = "xclk"; + AVDD-supply = <®ulator_camera>; + DOVDD-supply = <®ulator_camera>; + DVDD-supply = <®ulator_camera>; + /* Verdin GPIO_6 (SODIMM 218) - CAM_1_CON_PWRDWN */ + powerdown-gpios = <&main_gpio0 36 GPIO_ACTIVE_HIGH>; + /* Verdin GPIO_5 (SODIMM 216) - CAM_1_CON_RST */ + reset-gpios = <&main_gpio0 40 GPIO_ACTIVE_LOW>; + + port { + csi2_cam0: endpoint { + remote-endpoint = <&csi2rx0_in_sensor>; + clock-lanes = <0>; + data-lanes = <1 2>; + }; + }; + }; +}; + +&ti_csi2rx0 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am625-verdin-ov5640.dtso b/arch/arm64/boot/dts/ti/k3-am625-verdin-ov5640.dtso new file mode 100644 index 000000000000..e7f02cfaa94f --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am625-verdin-ov5640.dtso @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) Toradex + * + * Toradex CSI Camera Set 5MP OV5640 on Verdin CSI_1. + * + * https://developer.toradex.com/hardware/accessories/cameras/csi-camera-module-5mp-ov5640-arducam + * https://www.toradex.com/accessories/csi-camera-ov5640 + */ + +/dts-v1/; +/plugin/; + +#include "k3-am625-verdin-ov5640.dtsi" + +&clk_ov5640_osc { + clock-frequency = <27000000>; +}; From a63211b0b7c9cea098ab954bbafec31982c89f57 Mon Sep 17 00:00:00 2001 From: Vitor Soares Date: Fri, 22 May 2026 17:11:14 +0100 Subject: [PATCH 19/20] arm64: dts: ti: k3-am62-verdin: Add Toradex Verdin Mezzanine CAN Add a device tree overlay enabling AM62 MCU_MCAN1 on the Toradex Verdin Development Board with Verdin AM62 Mezzanine expansion board. MCU_MCAN1 is exposed on the Mezzanine CAN Header (J13), Pin 3 (CAN1_CONN_N) and Pin 4 (CAN1_CONN_P). Assisted-by: Claude:claude-sonnet-4.6 Signed-off-by: Vitor Soares Reviewed-by: Francesco Dolcini Link: https://patch.msgid.link/20260522161105.277519-23-ivitro@gmail.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/Makefile | 4 +++ .../ti/k3-am625-verdin-dev-mezzanine-can.dtso | 28 +++++++++++++++++++ 2 files changed, 32 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am625-verdin-dev-mezzanine-can.dtso diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index 60844951c9ce..90bb3b0522d3 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -29,6 +29,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am625-beagleplay-csi2-tevi-ov5640.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-phyboard-lyra-rdk.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-sk.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-tqma62xx-mba62xx.dtb +dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-dev-mezzanine-can.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-dev-nau8822-btl.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-dsi-to-hdmi.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-dsi-to-lvds-panel-cap-touch-10inch.dtbo @@ -228,6 +229,8 @@ k3-am625-sk-hdmi-audio-dtbs := k3-am625-sk.dtb k3-am62x-sk-hdmi-audio.dtbo k3-am625-verdin-wifi-dev-dsi-to-lvds-panel-cap-touch-10inch-dtbs := \ k3-am625-verdin-wifi-dev.dtb \ k3-am625-verdin-dsi-to-lvds-panel-cap-touch-10inch.dtbo +k3-am625-verdin-wifi-dev-mezzanine-can-dtbs := k3-am625-verdin-wifi-dev.dtb \ + k3-am625-verdin-dev-mezzanine-can.dtbo k3-am625-verdin-wifi-dev-nau8822-btl-dtbs := k3-am625-verdin-wifi-dev.dtb \ k3-am625-verdin-dev-nau8822-btl.dtbo k3-am625-verdin-wifi-dev-ov5640-24mhz-dtbs := k3-am625-verdin-wifi-dev.dtb \ @@ -344,6 +347,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \ k3-am625-sk-csi2-tevi-ov5640.dtb \ k3-am625-sk-hdmi-audio.dtb \ k3-am625-verdin-wifi-dev-dsi-to-lvds-panel-cap-touch-10inch.dtb \ + k3-am625-verdin-wifi-dev-mezzanine-can.dtb \ k3-am625-verdin-wifi-dev-nau8822-btl.dtb \ k3-am625-verdin-wifi-dev-ov5640-24mhz.dtb \ k3-am625-verdin-wifi-dev-ov5640.dtb \ diff --git a/arch/arm64/boot/dts/ti/k3-am625-verdin-dev-mezzanine-can.dtso b/arch/arm64/boot/dts/ti/k3-am625-verdin-dev-mezzanine-can.dtso new file mode 100644 index 000000000000..7ebf60d27c3c --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am625-verdin-dev-mezzanine-can.dtso @@ -0,0 +1,28 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) Toradex + * + * Enable AM62 MCU_MCAN1 exposed on Toradex Verdin Development Board with + * Verdin AM62 Mezzanine expansion board on CAN Header (J13), + * Pin 3 (CAN1_CONN_N) and Pin 4 (CAN1_CONN_P). + */ + +/dts-v1/; +/plugin/; + +#include "k3-pinctrl.h" + +&mcu_pmx0 { + pinctrl_mcu_mcan1: mcu-mcan1-default-pins { + pinctrl-single,pins = < + AM62X_MCU_IOPAD(0x0040, PIN_INPUT, 0) /* (D4) MCU_MCAN1_RX (SODIMM 116) */ + AM62X_MCU_IOPAD(0x003c, PIN_OUTPUT, 0) /* (E5) MCU_MCAN1_TX (SODIMM 128) */ + >; + }; +}; + +&mcu_mcan1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mcu_mcan1>; + status = "okay"; +}; From 837c7dbc5bee260768333c1f985dd0688b5aff8a Mon Sep 17 00:00:00 2001 From: Vitor Soares Date: Fri, 22 May 2026 17:11:15 +0100 Subject: [PATCH 20/20] arm64: dts: ti: k3-am62-verdin: Add Mezzanine with Toradex Display 10.1" LVDS Add a device tree overlay enabling the Toradex Capacitive Touch Display 10.1" LVDS on the Verdin Development Board with Verdin AM62 Mezzanine expansion board. The panel connects via the AM62 OLDI0 on the Mezzanine LVDS interface (J10). The panel is a LogicTechno LT170410-2WHC 10.1" WXGA IPS LCD and the touch input is provided by an Atmel MaxTouch capacitive touch controller. Link: https://developer.toradex.com/hardware/accessories/displays/capacitive-touch-display-101inch-lvds Assisted-by: Claude:claude-sonnet-4.6 Signed-off-by: Vitor Soares Reviewed-by: Francesco Dolcini Link: https://patch.msgid.link/20260522161105.277519-24-ivitro@gmail.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/Makefile | 5 + ...mezzanine-panel-cap-touch-10inch-lvds.dtso | 98 +++++++++++++++++++ 2 files changed, 103 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am625-verdin-dev-mezzanine-panel-cap-touch-10inch-lvds.dtso diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index 90bb3b0522d3..371f9a043fe5 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -30,6 +30,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am625-phyboard-lyra-rdk.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-sk.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-tqma62xx-mba62xx.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-dev-mezzanine-can.dtbo +dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-dev-mezzanine-panel-cap-touch-10inch-lvds.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-dev-nau8822-btl.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-dsi-to-hdmi.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-dsi-to-lvds-panel-cap-touch-10inch.dtbo @@ -231,6 +232,9 @@ k3-am625-verdin-wifi-dev-dsi-to-lvds-panel-cap-touch-10inch-dtbs := \ k3-am625-verdin-dsi-to-lvds-panel-cap-touch-10inch.dtbo k3-am625-verdin-wifi-dev-mezzanine-can-dtbs := k3-am625-verdin-wifi-dev.dtb \ k3-am625-verdin-dev-mezzanine-can.dtbo +k3-am625-verdin-wifi-dev-mezzanine-panel-cap-touch-10inch-lvds-dtbs := \ + k3-am625-verdin-wifi-dev.dtb \ + k3-am625-verdin-dev-mezzanine-panel-cap-touch-10inch-lvds.dtbo k3-am625-verdin-wifi-dev-nau8822-btl-dtbs := k3-am625-verdin-wifi-dev.dtb \ k3-am625-verdin-dev-nau8822-btl.dtbo k3-am625-verdin-wifi-dev-ov5640-24mhz-dtbs := k3-am625-verdin-wifi-dev.dtb \ @@ -348,6 +352,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \ k3-am625-sk-hdmi-audio.dtb \ k3-am625-verdin-wifi-dev-dsi-to-lvds-panel-cap-touch-10inch.dtb \ k3-am625-verdin-wifi-dev-mezzanine-can.dtb \ + k3-am625-verdin-wifi-dev-mezzanine-panel-cap-touch-10inch-lvds.dtb \ k3-am625-verdin-wifi-dev-nau8822-btl.dtb \ k3-am625-verdin-wifi-dev-ov5640-24mhz.dtb \ k3-am625-verdin-wifi-dev-ov5640.dtb \ diff --git a/arch/arm64/boot/dts/ti/k3-am625-verdin-dev-mezzanine-panel-cap-touch-10inch-lvds.dtso b/arch/arm64/boot/dts/ti/k3-am625-verdin-dev-mezzanine-panel-cap-touch-10inch-lvds.dtso new file mode 100644 index 000000000000..83fc4f3a24f5 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am625-verdin-dev-mezzanine-panel-cap-touch-10inch-lvds.dtso @@ -0,0 +1,98 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) Toradex + * + * Toradex Capacitive Touch Display 10.1" LVDS on the Verdin AM62 Mezzanine + * LVDS interface (J10), used with the Verdin Development Board. + * + * https://developer.toradex.com/hardware/accessories/displays/capacitive-touch-display-101inch-lvds + * https://www.toradex.com/accessories/capacitive-touch-display-10.1-inch-lvds + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include + +&{/} { + backlight_pwm2: backlight-pwm2 { + compatible = "pwm-backlight"; + brightness-levels = <0 45 63 88 119 158 203 255>; + default-brightness-level = <4>; + /* Verdin GPIO_4 (SODIMM 212) - LVDS_BKL_EN */ + enable-gpios = <&mcu_gpio0 4 GPIO_ACTIVE_HIGH>; + /* Verdin PWM_2 (SODIMM 16) - LVDS_PWM */ + pwms = <&epwm0 1 6666667 PWM_POLARITY_INVERTED>; + }; + + panel-lvds-native { + compatible = "logictechno,lt170410-2whc"; + backlight = <&backlight_pwm2>; + power-supply = <®_3v3_lvds>; + + port { + panel_lvds_native_in: endpoint { + remote-endpoint = <&oldi0_out>; + }; + }; + }; + + reg_3v3_lvds: regulator-3v3-lvds { + compatible = "regulator-fixed"; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "+V3.3_LVDS"; + }; +}; + +&dss { + status = "okay"; +}; + +&dss_ports { + #address-cells = <1>; + #size-cells = <0>; + + /* DSS VP1: internal DPI output to OLDIx */ + port@0 { + reg = <0>; + + dss0_out: endpoint { + remote-endpoint = <&oldi0_in>; + }; + }; +}; + +/* Verdin I2C_2_DSI */ +&main_i2c2 { + #address-cells = <1>; + #size-cells = <0>; + + touchscreen@4a { + compatible = "atmel,maxtouch"; + reg = <0x4a>; + /* Verdin GPIO_3 (SODIMM 210) - LVDS_TOUCH_INT# */ + interrupt-parent = <&mcu_gpio0>; + interrupts = <3 IRQ_TYPE_EDGE_FALLING>; + /* Verdin GPIO_2 (SODIMM 208) - LVDS_TOUCH_RST# */ + reset-gpios = <&mcu_gpio0 2 GPIO_ACTIVE_LOW>; + }; +}; + +&oldi0 { + status = "okay"; +}; + +&oldi0_port0 { + oldi0_in: endpoint { + remote-endpoint = <&dss0_out>; + }; +}; + +&oldi0_port1 { + oldi0_out: endpoint { + remote-endpoint = <&panel_lvds_native_in>; + }; +};