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Writing a PCI Host Controller driver requires bringing up the Root Complex hardware and registering it with the PCI core in a specific sequence. Add a guide describing these steps to help developers write new drivers. It covers the Root Complex topology and enumeration, and walks through the driver flow, including resource setup, Configuration Space accessors, address translation, interrupt handling, Link training, power management, shutdown and removal, using standard guidelines/best practices. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Link: https://patch.msgid.link/20260803-pci-doc-v1-1-2814f8672cad@oss.qualcomm.com |
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| .. | ||
| controller | ||
| endpoint | ||
| acpi-info.rst | ||
| boot-interrupts.rst | ||
| index.rst | ||
| msi-howto.rst | ||
| pci-error-recovery.rst | ||
| pci-iov-howto.rst | ||
| pci.rst | ||
| pcieaer-howto.rst | ||
| pciebus-howto.rst | ||
| sysfs-pci.rst | ||
| tph.rst | ||