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Pins registered with an fwnode may have .state_on_dpll_set implemented without advertising DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE upfront. Requiring the bit for fwnode pins ties firmware description to driver implementation details unnecessarily. Relax the capability check in dpll_pin_state_set() and dpll_pin_on_pin_state_set(): when a pin has an associated fwnode, bypass the capability gate and let the ops layer decide, returning -EOPNOTSUPP if .state_on_dpll_set is absent. Non-fwnode pins retain the original strict behavior. This is used later in the series by the SyncE_Ref output pin, which relies on the fwnode path for state control. Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com> Reviewed-by: Jiri Pirko <jiri@nvidia.com> Signed-off-by: Grzegorz Nitka <grzegorz.nitka@intel.com> Link: https://patch.msgid.link/20260607183045.1213735-10-grzegorz.nitka@intel.com Signed-off-by: Jakub Kicinski <kuba@kernel.org> |
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| .. | ||
| zl3073x | ||
| dpll_core.c | ||
| dpll_core.h | ||
| dpll_netlink.c | ||
| dpll_netlink.h | ||
| dpll_nl.c | ||
| dpll_nl.h | ||
| Kconfig | ||
| Makefile | ||