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8defec031c
and finally one new PLL rate for the rk3568 to fix display artifacts on a handheld devices based on that soc. -----BEGIN PGP SIGNATURE----- iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAmVyLqUQHGhlaWtvQHNu dGVjaC5kZQAKCRDzpnnJnNEdgcRmCACBK41MuaWd0yZdeQ0e/I1enSVESaWJSGtA A8abX1SkMADA7yclnLCqQYs+dExiuftL/okNzhWYWNW3GSZYSg2ayqzgewCFYcHq //+bLzikpxQM+UqobdRXkcrE7O0eDZEhQqhbSmvE/EDYtKWpovvS4jir5kBmbp+n zXOzQ2uYLcGcl20hme5LpqXURK+q0c6F76/PPgIzXXQDnaildZvL5Imb4LhSh8DL A4GWPJ8bAWfpFcFVWKW0ZF/HZlUX5X+3uyHTvZe1T1ctRiTePVTv6GNTptS3143A hBPMnSzficc6cUVSton+z6MCC9lJw8HtJCqw3luj7SNAyCWUktCg =oqhb -----END PGP SIGNATURE----- Merge tag 'v6.7-rockchip-clkfixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-fixes Pull Rockchip clk driver fixes for the merge window from Heiko Stuebner: Fixes for a wrong clockname, a wrong clock-parent, a wrong clock-gate and finally one new PLL rate for the rk3568 to fix display artifacts on a handheld devices based on that soc. * tag 'v6.7-rockchip-clkfixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: clk: rockchip: rk3128: Fix SCLK_SDMMC's clock name clk: rockchip: rk3128: Fix aclk_peri_src's parent clk: rockchip: rk3128: Fix HCLK_OTG gate register clk: rockchip: rk3568: Add PLL rate for 292.5MHz |
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| .. | ||
| actions | ||
| analogbits | ||
| at91 | ||
| axis | ||
| axs10x | ||
| baikal-t1 | ||
| bcm | ||
| berlin | ||
| davinci | ||
| hisilicon | ||
| imgtec | ||
| imx | ||
| ingenic | ||
| keystone | ||
| mediatek | ||
| meson | ||
| microchip | ||
| mmp | ||
| mstar | ||
| mvebu | ||
| mxs | ||
| nuvoton | ||
| nxp | ||
| pistachio | ||
| pxa | ||
| qcom | ||
| ralink | ||
| renesas | ||
| rockchip | ||
| samsung | ||
| sifive | ||
| socfpga | ||
| spear | ||
| sprd | ||
| st | ||
| starfive | ||
| stm32 | ||
| sunxi | ||
| sunxi-ng | ||
| tegra | ||
| ti | ||
| uniphier | ||
| ux500 | ||
| versatile | ||
| visconti | ||
| x86 | ||
| xilinx | ||
| zynq | ||
| zynqmp | ||
| .kunitconfig | ||
| clk_test.c | ||
| clk-apple-nco.c | ||
| clk-asm9260.c | ||
| clk-aspeed.c | ||
| clk-aspeed.h | ||
| clk-ast2600.c | ||
| clk-axi-clkgen.c | ||
| clk-axm5516.c | ||
| clk-bd718x7.c | ||
| clk-bm1880.c | ||
| clk-bulk.c | ||
| clk-cdce706.c | ||
| clk-cdce925.c | ||
| clk-clps711x.c | ||
| clk-composite.c | ||
| clk-conf.c | ||
| clk-cs2000-cp.c | ||
| clk-devres.c | ||
| clk-divider.c | ||
| clk-en7523.c | ||
| clk-fixed-factor.c | ||
| clk-fixed-mmio.c | ||
| clk-fixed-rate.c | ||
| clk-fractional-divider_test.c | ||
| clk-fractional-divider.c | ||
| clk-fractional-divider.h | ||
| clk-fsl-flexspi.c | ||
| clk-fsl-sai.c | ||
| clk-gate_test.c | ||
| clk-gate.c | ||
| clk-gemini.c | ||
| clk-gpio.c | ||
| clk-hi655x.c | ||
| clk-highbank.c | ||
| clk-hsdk-pll.c | ||
| clk-k210.c | ||
| clk-lan966x.c | ||
| clk-lmk04832.c | ||
| clk-lochnagar.c | ||
| clk-loongson1.c | ||
| clk-loongson2.c | ||
| clk-max9485.c | ||
| clk-max77686.c | ||
| clk-milbeaut.c | ||
| clk-moxart.c | ||
| clk-multiplier.c | ||
| clk-mux.c | ||
| clk-nomadik.c | ||
| clk-npcm7xx.c | ||
| clk-nspire.c | ||
| clk-palmas.c | ||
| clk-plldig.c | ||
| clk-pwm.c | ||
| clk-qoriq.c | ||
| clk-renesas-pcie.c | ||
| clk-rk808.c | ||
| clk-s2mps11.c | ||
| clk-scmi.c | ||
| clk-scpi.c | ||
| clk-si514.c | ||
| clk-si521xx.c | ||
| clk-si544.c | ||
| clk-si570.c | ||
| clk-si5341.c | ||
| clk-si5351.c | ||
| clk-si5351.h | ||
| clk-sp7021.c | ||
| clk-sparx5.c | ||
| clk-stm32f4.c | ||
| clk-stm32h7.c | ||
| clk-stm32mp1.c | ||
| clk-tps68470.c | ||
| clk-twl.c | ||
| clk-twl6040.c | ||
| clk-versaclock3.c | ||
| clk-versaclock5.c | ||
| clk-versaclock7.c | ||
| clk-vt8500.c | ||
| clk-wm831x.c | ||
| clk-xgene.c | ||
| clk.c | ||
| clk.h | ||
| clkdev.c | ||
| Kconfig | ||
| Makefile | ||