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fe2e27bb92
These are arriving very late in the release cycle, but there has been a change of maintainers on the SPEAr platform and they have needed a while to get going. The patch count is higher than I would like at this point, but they're all relevant fixes and well-contained in their own platform code. I still think it's suitable 3.5 material and I don't think it should increase the need for a -rc8 since they are so contained. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJQBti2AAoJEIwa5zzehBx3ykIQAIHD8BAfgLXeAESb8dfP3yhv 4Ok0JEqydaF4WNaHA1vsvOUqEVsfXPuR2YxFE3mTNJCexu5XaTt0YEfVC3M+tB37 uE3HTGYffwMwc6ZuWX4LPWFHP2yNEIlW4ExfKKl76hdv1jbfhPezftuxAiQ8l4+j fj5H9QhlUqEF0s0ZOihmmnsvKuR0/f8utUmMD8rFYofQSN4lOj26o5pfRrWDrmW7 yLxpW01C+SVfwBlvlBW3tVpY5AZ5AxA5C02l8e6+9dRXNIWy88IZXvYRFELI7g3o vSQ5iKkTXn1r+T4OWvtAECpZA1/NAp49YnXJcI+qYddsrSP/gNwpCS887/kIXaQT Z0poElua9GBTKykjetkhhnLAHuiJqxZO96hdFcsDFBHUKw8ovDl3vuCQgzE/9yYI btHh4AnAyQGgLYdJd0xVVuCnbVY1JRyWW5/YIxKR58Zf/NAkBsvSmSX88duP3Iku 5YvnXHGNvvHr5O7QViNWkCZor/0ezQs39grl3008cYHAqnQA6TJqBYLjVANLfc6H 06MwyV0CAx6PMj/QZ3lRLhQFkfXpoJaKcOI5JvQxfj9lWYeticeCZVmCET/3wOng Acn6QqpHd6TzP/xhUfe7mMuxxubz/DvNK7UgCbmX+YE8fdIXl8vzMBdZLXyekNC5 4iKzKeYvuAeFO5X3yP3K =cBuT -----END PGP SIGNATURE----- Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC fixes for SPEAr from Olof Johansson: "These are arriving very late in the release cycle, but there has been a change of maintainers on the SPEAr platform and they have needed a while to get going. The patch count is higher than I would like at this point, but they're all relevant fixes and well-contained in their own platform code. I still think it's suitable 3.5 material and I don't think it should increase the need for a -rc8 since they are so contained." * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: SPEAr600: Fix timer interrupt definition in spear600.dtsi ARM: dts: SPEAr320: Boot the board in EXTENDED_MODE ARM: dts: SPEAr320: Fix compatible string Clk: SPEAr1340: Update sys clock parent array clk: SPEAr1340: Fix clk enable register for uart1 and i2c1. ARM: SPEAr13xx: Fix Interrupt bindings Clk:spear6xx:Fix: Rename clk ids within predefined limit Clk:spear3xx:Fix: Rename clk ids within predefined limit clk:spear1310:Fix: Rename clk ids within predefined limit clk:spear1340:Fix: Rename clk ids within predefined limit |
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