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Currently, the __pci_dev_resource_attr() helper macro takes the attribute name suffix as its third parameter, even though the suffix is what distinguishes the three attribute variants built on top of it. Additionally, the pci_dev_resource_attr() wrapper passes an empty suffix, and with the suffix placed in the middle of the parameter list its invocation contains two consecutive commas, which checkpatch.pl highlights, as follows: ERROR: space required after that ',' (ctx:VxO) Move the suffix to the front so that the variant selector comes first and the empty argument follows the opening parenthesis, which checkpatch.pl does not complain about. This also matches the parameter order used by the PCI legacy I/O and memory attribute macros introduced in a subsequent change. No functional changes intended. Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Link: https://patch.msgid.link/20260721020427.1541197-3-kwilczynski@kernel.org
405 lines
10 KiB
C
405 lines
10 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* arch/alpha/kernel/pci-sysfs.c
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*
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* Copyright (C) 2009 Ivan Kokshaysky
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*
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* Alpha PCI resource files.
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*
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* Loosely based on generic HAVE_PCI_MMAP implementation in
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* drivers/pci/pci-sysfs.c
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*/
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#include <linux/sched.h>
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#include <linux/security.h>
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#include <linux/pci.h>
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static int hose_mmap_page_range(struct pci_controller *hose,
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struct vm_area_struct *vma,
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enum pci_mmap_state mmap_type, int sparse)
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{
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unsigned long base;
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if (mmap_type == pci_mmap_mem)
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base = sparse ? hose->sparse_mem_base : hose->dense_mem_base;
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else
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base = sparse ? hose->sparse_io_base : hose->dense_io_base;
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vma->vm_pgoff += base >> PAGE_SHIFT;
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return io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
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vma->vm_end - vma->vm_start,
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vma->vm_page_prot);
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}
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static int __pci_mmap_fits(struct pci_dev *pdev, int num,
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struct vm_area_struct *vma, int sparse)
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{
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resource_size_t len = pci_resource_len(pdev, num);
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unsigned long nr, start, size;
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int shift = sparse ? 5 : 0;
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if (!len)
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return 0;
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nr = vma_pages(vma);
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start = vma->vm_pgoff;
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size = ((len - 1) >> (PAGE_SHIFT - shift)) + 1;
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return start < size && size - start >= nr;
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}
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/**
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* pci_mmap_resource - map a PCI resource into user memory space
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* @kobj: kobject for mapping
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* @attr: struct bin_attribute for the file being mapped
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* @vma: struct vm_area_struct passed into the mmap
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* @sparse: address space type
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*
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* Use the bus mapping routines to map a PCI resource into userspace.
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*
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* Return: %0 on success, negative error code otherwise
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*/
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static int pci_mmap_resource(struct kobject *kobj,
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const struct bin_attribute *attr,
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struct vm_area_struct *vma, int sparse)
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{
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struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
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int barno = (unsigned long)attr->private;
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enum pci_mmap_state mmap_type;
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struct pci_bus_region bar;
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int ret;
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ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
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if (ret)
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return ret;
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if (pci_resource_is_mem(pdev, barno) &&
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iomem_is_exclusive(pci_resource_start(pdev, barno)))
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return -EINVAL;
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if (!__pci_mmap_fits(pdev, barno, vma, sparse))
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return -EINVAL;
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pcibios_resource_to_bus(pdev->bus, &bar, pci_resource_n(pdev, barno));
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vma->vm_pgoff += bar.start >> (PAGE_SHIFT - (sparse ? 5 : 0));
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mmap_type = pci_resource_is_mem(pdev, barno) ? pci_mmap_mem : pci_mmap_io;
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return hose_mmap_page_range(pdev->sysdata, vma, mmap_type, sparse);
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}
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static int pci_mmap_resource_sparse(struct file *filp, struct kobject *kobj,
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const struct bin_attribute *attr,
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struct vm_area_struct *vma)
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{
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return pci_mmap_resource(kobj, attr, vma, 1);
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}
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static int pci_mmap_resource_dense(struct file *filp, struct kobject *kobj,
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const struct bin_attribute *attr,
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struct vm_area_struct *vma)
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{
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return pci_mmap_resource(kobj, attr, vma, 0);
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}
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#define __pci_dev_resource_attr(_suffix, _bar, _name, _mmap) \
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static const struct bin_attribute \
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pci_dev_resource##_bar##_suffix##_attr = { \
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.attr = { .name = __stringify(_name), .mode = 0600 }, \
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.private = (void *)(unsigned long)(_bar), \
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.mmap = (_mmap), \
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}
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#define pci_dev_resource_attr(_bar) \
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__pci_dev_resource_attr(, _bar, resource##_bar, \
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pci_mmap_resource_dense)
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#define pci_dev_resource_sparse_attr(_bar) \
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__pci_dev_resource_attr(_sparse, _bar, resource##_bar##_sparse, \
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pci_mmap_resource_sparse)
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#define pci_dev_resource_dense_attr(_bar) \
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__pci_dev_resource_attr(_dense, _bar, resource##_bar##_dense, \
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pci_mmap_resource_dense)
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static int sparse_mem_mmap_fits(struct pci_dev *pdev, int num)
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{
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struct pci_bus_region bar;
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struct pci_controller *hose = pdev->sysdata;
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long dense_offset;
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unsigned long sparse_size;
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pcibios_resource_to_bus(pdev->bus, &bar, pci_resource_n(pdev, num));
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/* All core logic chips have 4G sparse address space, except
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CIA which has 16G (see xxx_SPARSE_MEM and xxx_DENSE_MEM
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definitions in asm/core_xxx.h files). This corresponds
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to 128M or 512M of the bus space. */
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dense_offset = (long)(hose->dense_mem_base - hose->sparse_mem_base);
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sparse_size = dense_offset >= 0x400000000UL ? 0x20000000 : 0x8000000;
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return bar.end < sparse_size;
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}
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/* Legacy I/O bus mapping stuff. */
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static int __legacy_mmap_fits(struct vm_area_struct *vma,
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unsigned long res_size)
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{
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unsigned long nr, start, size;
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nr = vma_pages(vma);
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start = vma->vm_pgoff;
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size = ((res_size - 1) >> PAGE_SHIFT) + 1;
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return start < size && size - start >= nr;
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}
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static inline int has_sparse(struct pci_controller *hose,
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enum pci_mmap_state mmap_type)
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{
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unsigned long base;
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base = (mmap_type == pci_mmap_mem) ? hose->sparse_mem_base :
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hose->sparse_io_base;
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return base != 0;
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}
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int pci_mmap_legacy_page_range(struct pci_bus *bus, struct vm_area_struct *vma,
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enum pci_mmap_state mmap_type)
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{
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struct pci_controller *hose = bus->sysdata;
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int sparse = has_sparse(hose, mmap_type);
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unsigned long res_size;
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res_size = (mmap_type == pci_mmap_mem) ? PCI_LEGACY_MEM_SIZE :
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PCI_LEGACY_IO_SIZE;
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if (sparse)
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res_size <<= 5;
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if (!__legacy_mmap_fits(vma, res_size))
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return -EINVAL;
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return hose_mmap_page_range(hose, vma, mmap_type, sparse);
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}
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bool pci_legacy_has_sparse(struct pci_bus *bus, enum pci_mmap_state type)
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{
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struct pci_controller *hose = bus->sysdata;
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return has_sparse(hose, type);
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}
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/* Legacy I/O bus read/write functions */
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int pci_legacy_read(struct pci_bus *bus, loff_t port, u32 *val, size_t size)
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{
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struct pci_controller *hose = bus->sysdata;
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port += hose->io_space->start;
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switch(size) {
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case 1:
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*((u8 *)val) = inb(port);
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return 1;
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case 2:
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if (port & 1)
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return -EINVAL;
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*((u16 *)val) = inw(port);
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return 2;
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case 4:
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if (port & 3)
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return -EINVAL;
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*((u32 *)val) = inl(port);
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return 4;
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}
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return -EINVAL;
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}
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int pci_legacy_write(struct pci_bus *bus, loff_t port, u32 val, size_t size)
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{
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struct pci_controller *hose = bus->sysdata;
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port += hose->io_space->start;
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switch(size) {
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case 1:
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outb(val, port);
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return 1;
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case 2:
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if (port & 1)
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return -EINVAL;
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outw(val, port);
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return 2;
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case 4:
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if (port & 3)
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return -EINVAL;
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outl(val, port);
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return 4;
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}
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return -EINVAL;
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}
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pci_dev_resource_attr(0);
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pci_dev_resource_attr(1);
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pci_dev_resource_attr(2);
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pci_dev_resource_attr(3);
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pci_dev_resource_attr(4);
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pci_dev_resource_attr(5);
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pci_dev_resource_sparse_attr(0);
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pci_dev_resource_sparse_attr(1);
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pci_dev_resource_sparse_attr(2);
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pci_dev_resource_sparse_attr(3);
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pci_dev_resource_sparse_attr(4);
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pci_dev_resource_sparse_attr(5);
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pci_dev_resource_dense_attr(0);
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pci_dev_resource_dense_attr(1);
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pci_dev_resource_dense_attr(2);
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pci_dev_resource_dense_attr(3);
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pci_dev_resource_dense_attr(4);
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pci_dev_resource_dense_attr(5);
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static inline enum pci_mmap_state pci_bar_mmap_type(struct pci_dev *pdev,
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int bar)
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{
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return pci_resource_is_mem(pdev, bar) ? pci_mmap_mem : pci_mmap_io;
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}
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static inline umode_t __pci_resource_attr_is_visible(struct kobject *kobj,
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const struct bin_attribute *a,
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int bar)
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{
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struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
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if (!pci_resource_len(pdev, bar))
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return 0;
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return a->attr.mode;
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}
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static umode_t pci_dev_resource_is_visible(struct kobject *kobj,
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const struct bin_attribute *a,
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int bar)
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{
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struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
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struct pci_controller *hose = pdev->sysdata;
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if (has_sparse(hose, pci_bar_mmap_type(pdev, bar)))
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return 0;
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return __pci_resource_attr_is_visible(kobj, a, bar);
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}
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static umode_t pci_dev_resource_sparse_is_visible(struct kobject *kobj,
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const struct bin_attribute *a,
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int bar)
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{
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struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
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struct pci_controller *hose = pdev->sysdata;
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enum pci_mmap_state type = pci_bar_mmap_type(pdev, bar);
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if (!has_sparse(hose, type))
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return 0;
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if (type == pci_mmap_mem && !sparse_mem_mmap_fits(pdev, bar))
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return 0;
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return __pci_resource_attr_is_visible(kobj, a, bar);
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}
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static umode_t pci_dev_resource_dense_is_visible(struct kobject *kobj,
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const struct bin_attribute *a,
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int bar)
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{
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struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
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struct pci_controller *hose = pdev->sysdata;
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enum pci_mmap_state type = pci_bar_mmap_type(pdev, bar);
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unsigned long dense_base;
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if (!has_sparse(hose, type))
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return 0;
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if (type == pci_mmap_mem && !sparse_mem_mmap_fits(pdev, bar))
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return __pci_resource_attr_is_visible(kobj, a, bar);
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dense_base = (type == pci_mmap_mem) ? hose->dense_mem_base :
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hose->dense_io_base;
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if (!dense_base)
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return 0;
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return __pci_resource_attr_is_visible(kobj, a, bar);
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}
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static inline size_t __pci_dev_resource_bin_size(struct kobject *kobj,
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int bar, bool sparse)
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{
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struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
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size_t size = pci_resource_len(pdev, bar);
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return sparse ? size << 5 : size;
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}
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static size_t pci_dev_resource_bin_size(struct kobject *kobj,
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const struct bin_attribute *a,
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int bar)
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{
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return __pci_dev_resource_bin_size(kobj, bar, false);
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}
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static size_t pci_dev_resource_sparse_bin_size(struct kobject *kobj,
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const struct bin_attribute *a,
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int bar)
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{
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return __pci_dev_resource_bin_size(kobj, bar, true);
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}
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static const struct bin_attribute *const pci_dev_resource_attrs[] = {
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&pci_dev_resource0_attr,
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&pci_dev_resource1_attr,
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&pci_dev_resource2_attr,
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&pci_dev_resource3_attr,
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&pci_dev_resource4_attr,
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&pci_dev_resource5_attr,
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NULL,
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};
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static const struct bin_attribute *const pci_dev_resource_sparse_attrs[] = {
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&pci_dev_resource0_sparse_attr,
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&pci_dev_resource1_sparse_attr,
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&pci_dev_resource2_sparse_attr,
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&pci_dev_resource3_sparse_attr,
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&pci_dev_resource4_sparse_attr,
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&pci_dev_resource5_sparse_attr,
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NULL,
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};
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static const struct bin_attribute *const pci_dev_resource_dense_attrs[] = {
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&pci_dev_resource0_dense_attr,
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&pci_dev_resource1_dense_attr,
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&pci_dev_resource2_dense_attr,
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&pci_dev_resource3_dense_attr,
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&pci_dev_resource4_dense_attr,
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&pci_dev_resource5_dense_attr,
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NULL,
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};
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const struct attribute_group pci_dev_resource_attr_group = {
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.bin_attrs = pci_dev_resource_attrs,
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.is_bin_visible = pci_dev_resource_is_visible,
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.bin_size = pci_dev_resource_bin_size,
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};
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const struct attribute_group pci_dev_resource_sparse_attr_group = {
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.bin_attrs = pci_dev_resource_sparse_attrs,
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.is_bin_visible = pci_dev_resource_sparse_is_visible,
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.bin_size = pci_dev_resource_sparse_bin_size,
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};
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const struct attribute_group pci_dev_resource_dense_attr_group = {
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.bin_attrs = pci_dev_resource_dense_attrs,
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.is_bin_visible = pci_dev_resource_dense_is_visible,
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.bin_size = pci_dev_resource_bin_size,
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};
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