linux/arch/riscv
Thomas Gleixner f37202aa6e irqchip changes for 6.4
- Large RISC-V IPI rework to make way for a new interrupt
   architecture
 
 - More Loongarch fixes from Lianmin Lv, fixing issues in the so
   called "dual-bridge" systems.
 
 - Workaround for the nvidia T241 chip that gets confused in
   3 and 4 socket configurations, leading to the GIC
   malfunctionning in some contexts
 
 - Drop support for non-firmware driven GIC configurarations
   now that the old ARM11MP Cavium board is gone
 
 - Workaround for the Rockchip 3588 chip that doesn't
   correctly deal with the shareability attributes.
 
 - Replace uses of of_find_property() with the more appropriate
   of_property_read_bool()
 
 - Make bcm-6345-l1 request its MMIO region
 
 - Add suspend support to the SiFive PLIC
 
 - Drop support for stih415, stih416 and stid127 platforms
 -----BEGIN PGP SIGNATURE-----
 
 iQJDBAABCgAtFiEEn9UcU+C1Yxj9lZw9I9DQutE9ekMFAmRCjF0PHG1hekBrZXJu
 ZWwub3JnAAoJECPQ0LrRPXpDfAcQAMCqxwZcMPtMDcj1pfuiPM4mcPnb81nB80ms
 0Clc+O/fLvW4bduVQN9S+P4aJ3WNYUw0nTrF13CzUZpPOLGt8NlylSZ0+EQV6+th
 60+YoJ0X5ovlQ6tMUzhJjuU2HFQxXyvNmkXsrr4xaPlZaOt01OCNGhKVwuq+f7nJ
 U87id3M3Nt6dSj//NonBdy+61y/XZiPQXZZP6act71f5Rz+REnBdEESzWLbzV9jo
 UiVZD24OWLE+A0N4JqTXI4ruXIaOdwfOi31hN/OF3JrWWrM99RYK/pLJM/mEvCdw
 HA0acS/uj9wQLUD9OFPCKE3aGOA4rdcWUrwzQvINZMIezHgaWfuOT/J5BbF9iH+Y
 nrySLQB9xl9TVtMsfCOmjc+yPDDQ0AycrV++pn6CH59dx4WR3e2wTe68arHMoO9h
 ljvEHVb2inDYJqHhyYKhNehlD1YGNFcOT4QRrduWxQezl3RKdYEjJngmm7QBfRT1
 ee62Jm2RodPAknuDnnJNsFnHAE8emu9RLdKviEmPT66oclhw2sgn/V2JC+O+Oe0e
 TkXrn4AzrIpEjbEUMJAow7RTSpzIGx921fcqbSpZrf6k75rgxaKBPPxtV4uANfII
 gbOKklj15pljuPuxsputWzkdU9xVvgdg/5CHw6+AA68rNeB16NbTMe9RsiYNzlF6
 7XBGnW3Q
 =TsID
 -----END PGP SIGNATURE-----

Merge tag 'irqchip-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core

Pull irqchip changes from Marc Zyngier:

 - Large RISC-V IPI rework to make way for a new interrupt
   architecture

 - More Loongarch fixes from Lianmin Lv, fixing issues in the so
   called "dual-bridge" systems.

 - Workaround for the nvidia T241 chip that gets confused in
   3 and 4 socket configurations, leading to the GIC
   malfunctionning in some contexts

 - Drop support for non-firmware driven GIC configurarations
   now that the old ARM11MP Cavium board is gone

 - Workaround for the Rockchip 3588 chip that doesn't
   correctly deal with the shareability attributes.

 - Replace uses of of_find_property() with the more appropriate
   of_property_read_bool()

 - Make bcm-6345-l1 request its MMIO region

 - Add suspend support to the SiFive PLIC

 - Drop support for stih415, stih416 and stid127 platforms

Link: https://lore.kernel.org/lkml/20230421132104.3021536-1-maz@kernel.org
2023-04-21 17:30:57 +02:00
..
boot SoC: DT changes for 6.3 2023-02-20 15:49:56 -08:00
configs riscv: defconfig: Enable the Allwinner D1 platform and drivers 2023-01-27 23:10:08 +01:00
errata RISC-V: fix taking the text_mutex twice during sifive errata patching 2023-03-07 12:39:12 -08:00
include irqchip changes for 6.4 2023-04-21 17:30:57 +02:00
kernel RISC-V: Allow marking IPIs as suitable for remote FENCEs 2023-04-08 11:26:24 +01:00
kvm riscv/kvm: Fix VM hang in case of timer delta being zero. 2023-03-17 13:32:54 +05:30
lib riscv, lib: Fix Zbb strncmp 2023-02-28 18:42:38 -08:00
mm RISC-V: Use IPIs for remote icache flush when possible 2023-04-08 11:26:24 +01:00
net riscv, bpf: Fix patch_text implicit declaration 2023-02-27 22:14:33 +01:00
purgatory RISC-V: add infrastructure to allow different str* implementations 2023-01-31 11:43:23 -08:00
Kbuild riscv: move errata/ and kvm/ builds to arch/riscv/Kbuild 2022-06-01 22:26:32 -07:00
Kconfig irqchip changes for 6.4 2023-04-21 17:30:57 +02:00
Kconfig.debug
Kconfig.erratas RISC-V: always select RISCV_ALTERNATIVE for non-xip kernels 2023-03-29 11:48:39 -07:00
Kconfig.socs RISC-V Patches for the 6.3 Merge Window, Part 1 2023-02-25 11:14:08 -08:00
Makefile riscv: Handle zicsr/zifencei issues between clang and binutils 2023-03-23 12:52:49 -07:00