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36cac4b510
The primary interrupt handler (imx_mu_isr()) no longer invokes any callbacks it only masks the interrupt source and returns. In a forced-threaded environment the IRQ-core will force-thread the primary handler which can be avoided. The primary handler uses a spinlock_t to protect the RMW operation in imx_mu_xcr_rmw() - nothing that may introduce long latencies. The lock can be turned into a raw_spinlock_t and then the primary handler can run in hardirq context even on PREEMPT_RT skipping one thread. Make struct imx_mu_priv::xcr_lock a raw_spinlock_t and skip force-threading the primrary handler by marking it IRQF_NO_THREAD. Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com> |
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| .. | ||
| arm_mhu_db.c | ||
| arm_mhu.c | ||
| arm_mhuv2.c | ||
| arm_mhuv3.c | ||
| armada-37xx-rwtm-mailbox.c | ||
| ast2700-mailbox.c | ||
| bcm-flexrm-mailbox.c | ||
| bcm-pdc-mailbox.c | ||
| bcm2835-mailbox.c | ||
| bcm74110-mailbox.c | ||
| cix-mailbox.c | ||
| cv1800-mailbox.c | ||
| exynos-mailbox.c | ||
| hi3660-mailbox.c | ||
| hi6220-mailbox.c | ||
| imx-mailbox.c | ||
| Kconfig | ||
| mailbox-altera.c | ||
| mailbox-mchp-ipc-sbi.c | ||
| mailbox-mpfs.c | ||
| mailbox-sti.c | ||
| mailbox-test.c | ||
| mailbox-th1520.c | ||
| mailbox-xgene-slimpro.c | ||
| mailbox.c | ||
| Makefile | ||
| mtk-adsp-mailbox.c | ||
| mtk-cmdq-mailbox.c | ||
| mtk-gpueb-mailbox.c | ||
| mtk-vcp-mailbox.c | ||
| omap-mailbox.c | ||
| pcc.c | ||
| pl320-ipc.c | ||
| platform_mhu.c | ||
| qcom-apcs-ipc-mailbox.c | ||
| qcom-cpucp-mbox.c | ||
| qcom-ipcc.c | ||
| riscv-sbi-mpxy-mbox.c | ||
| rockchip-mailbox.c | ||
| sprd-mailbox.c | ||
| stm32-ipcc.c | ||
| sun6i-msgbox.c | ||
| tegra-hsp.c | ||
| ti-msgmgr.c | ||
| zynqmp-ipi-mailbox.c | ||