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Each of the CPSW5G ports in J7200 support additional modes like QSGMII. Add a new compatible for J7200 to support the additional modes. In TI's J7200, each of the CPSW5G ethernet interfaces can act as a QSGMII or QSGMII-SUB port. The QSGMII interface is responsible for performing auto-negotiation between the MAC and the PHY while the rest of the interfaces are designated as QSGMII-SUB interfaces, indicating that they will not be taking part in the auto-negotiation process. To indicate the interface which will serve as the main QSGMII interface, add a property "ti,qsgmii-main-ports", whose value indicates the port number of the interface which shall serve as the main QSGMII interface. The rest of the interfaces are then assigned QSGMII-SUB mode by default. The property "ti,qsgmii-main-ports" is used to configure the CTRLMMR_ENETx_CTRL register. Depending on the device, it is possible for more than one QSGMII main port to exist. Thus, the property "ti,qsgmii-main-ports" is defined as an array of values in order to reuse the property for other devices. Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> Link: https://lore.kernel.org/r/20220912085650.83263-4-s-vadapalli@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org> |
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| .. | ||
| Kconfig | ||
| Makefile | ||
| phy-am654-serdes.c | ||
| phy-da8xx-usb.c | ||
| phy-dm816x-usb.c | ||
| phy-gmii-sel.c | ||
| phy-j721e-wiz.c | ||
| phy-omap-control.c | ||
| phy-omap-usb2.c | ||
| phy-ti-pipe3.c | ||
| phy-tusb1210.c | ||
| phy-twl4030-usb.c | ||