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Several HWRM commands carry __le64 DMA address fields in their input structures; firmware reads from or writes to the memory those addresses point to. Have a static per-command descriptor table in the driver that records the details of the DMA fields in each supported HWRM input struct. When a DMA-bearing HWRM command arrives, the driver reads the userspace pointer out of each declared address field and clears the field, allocates a DMA-coherent kernel buffer sized from the command's own length information, copies data to/from the userspace pointer, and patches the field with the real DMA bus address before the command is sent to firmware. Responses are copied back to the original userspace pointer afterward. Scope-gated allow-list and timeout value list are updated with the new the commands. Signed-off-by: Pavan Chebbi <pavan.chebbi@broadcom.com> Link: https://patch.msgid.link/20260807125846.45570-3-pavan.chebbi@broadcom.com Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> |
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