The DWC3 controller may have different RAM configurations.
For 2-RAM configuration and 3-RAM configuration, the RAM1
depth is used for the TxFIFOs. And for 1-RAM configuration
(e.g. RV1109/RV1106), RAM0 depth contains the descriptor
cache depth, RxFIFOs depth, and TxFIFOs depth.
This patch checks the number of RAM configuration from
the hwparams1 and get the TxFIFOs depth correctly.
Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: Iff0c4d0540d920ca9277496e27d2b9f90e956341
2272d9dec7