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f4151b9ba8
Right now TLB entry 0 ist used as UART0 mapping for the early debug output (via CONFIG_SERIAL_TEXT_DEBUG). This causes problems when many TLB's get used upon Linux bootup (e.g. while PCIe scanning behind bridges and/or switches on 440SPe platforms). This will overwrite the TLB 0 entry and further debug output's may crash/hang the system. This patch moves the early debug UART0 TLB entry from 0 to 62 as done in arch/powerpc. This way it is in the "pinned" area and will not get overwritten. Also the arch/ppc/mm/44x_mmu.c code is now synced with the newer code from arch/powerpc. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com> |
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| .. | ||
| 4xx_mmu.c | ||
| 44x_mmu.c | ||
| fault.c | ||
| fsl_booke_mmu.c | ||
| hashtable.S | ||
| init.c | ||
| Makefile | ||
| mem_pieces.c | ||
| mem_pieces.h | ||
| mmu_context.c | ||
| mmu_decl.h | ||
| pgtable.c | ||
| ppc_mmu.c | ||
| tlb.c | ||