linux/drivers/pci
Mario Limonciello dff6139015 PCI/ACPI: Allow D3 only if Root Port can signal and wake from D3
acpi_pci_bridge_d3(dev) returns "true" if "dev" is a hotplug bridge that
can handle hotplug events while in D3.  Previously this meant either:

  - "dev" has a _PS0 or _PR0 method (acpi_pci_power_manageable()), or

  - The Root Port above "dev" has a _DSD with a "HotPlugSupportInD3"
    property with value 1.

This did not consider _PRW, which tells us about wakeup GPEs (ACPI v6.4,
sec 7.3.13).  Without a wakeup GPE, from an ACPI perspective the Root Port
has no way of generating wakeup signals, so hotplug events will be lost if
we use D3.

Similarly, it did not consider _S0W, which tells us the deepest D-state
from which a device can wake itself (sec 7.3.20).  If _S0W tells us the
device cannot wake from D3, hotplug events will again be lost if we use D3.

Some platforms, e.g., AMD Yellow Carp, supply "HotPlugSupportInD3" without
_PRW or with an _S0W that says the Root Port cannot wake from D3.  On those
platforms, we previously put bridges in D3hot, hotplug events were lost,
and hotplugged devices would not be recognized without manually rescanning.

Allow bridges to be put in D3 only if the Root Port can generate wakeup
GPEs (wakeup.flags.valid), it can wake from D3 (_S0W), AND it has the
"HotPlugSupportInD3" property.

Neither Windows 10 nor Windows 11 puts the bridge in D3 when the firmware
is configured this way, and this change aligns the handling of the
situation to be the same.

[bhelgaas: commit log, tidy "HotPlugSupportInD3" check and comment]
Link: https://uefi.org/htmlspecs/ACPI_Spec_6_4_html/07_Power_and_Performance_Mgmt/device-power-management-objects.html?highlight=s0w#s0w-s0-device-wake-state
Link: https://docs.microsoft.com/en-us/windows-hardware/drivers/pci/dsd-for-pcie-root-ports#identifying-pcie-root-ports-supporting-hot-plug-in-d3
Link: https://lore.kernel.org/r/20220401034003.3166-1-mario.limonciello@amd.com
Fixes: 26ad34d510 ("PCI / ACPI: Whitelist D3 for more PCIe hotplug ports")
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2022-04-04 09:31:19 -05:00
..
controller pci-v5.18-changes-2 2022-04-02 10:54:52 -07:00
endpoint PCI: endpoint: Fix misused goto label 2022-03-07 11:42:12 +00:00
hotplug pci-v5.18-changes 2022-03-25 13:02:05 -07:00
msi PCI/MSI: Remove bogus warning in pci_irq_get_affinity() 2022-02-04 09:54:20 +01:00
pcie pci-v5.18-changes 2022-03-25 13:02:05 -07:00
switch PCI/switchtec: Declare local state_names[] as static 2021-11-19 12:14:02 -06:00
access.c PCI: Reduce warnings on possible RW1C corruption 2022-03-04 15:59:52 -06:00
ats.c PCI: Allow PASID on fake PCIe devices without TLP prefixes 2021-08-26 14:21:42 -05:00
bus.c
ecam.c PCI: Dynamically map ECAM regions 2021-06-16 17:20:40 -05:00
host-bridge.c PCI: VMD: ACPI: Make ACPI companion lookup work for VMD bus 2021-09-02 17:59:58 +02:00
iov.c PCI/IOV: Fix wrong kernel-doc identifier 2022-03-07 12:06:10 -07:00
irq.c
Kconfig PCI/VGA: Move vgaarb to drivers/pci 2022-03-09 18:30:46 -06:00
Makefile PCI/VGA: Move vgaarb to drivers/pci 2022-03-09 18:30:46 -06:00
mmap.c
of.c PCI: Correct misspelled words 2022-01-07 20:43:23 -06:00
p2pdma.c PCI/P2PDMA: Add Intel 3rd Gen Intel Xeon Scalable Processors to whitelist 2022-02-25 11:03:30 -06:00
pci-acpi.c PCI/ACPI: Allow D3 only if Root Port can signal and wake from D3 2022-04-04 09:31:19 -05:00
pci-bridge-emul.c Merge branch 'remotes/lorenzo/pci/mvebu' 2022-03-22 17:16:25 -05:00
pci-bridge-emul.h PCI: pci-bridge-emul: Add support for PCI Bridge Subsystem Vendor ID capability 2022-02-22 16:04:19 +00:00
pci-driver.c Changes in this cycle were: 2022-03-22 14:39:12 -07:00
pci-label.c PCI/sysfs: Use sysfs_emit() and sysfs_emit_at() in "show" functions 2021-06-03 22:14:47 -05:00
pci-mid.c PCI: PM: Do not use pci_platform_pm_ops for Intel MID PM 2021-09-27 17:13:21 +02:00
pci-pf-stub.c
pci-stub.c
pci-sysfs.c PCI: Remove unused assignments 2022-03-22 11:23:53 -05:00
pci.c pci-v5.17-changes 2022-01-16 08:08:11 +02:00
pci.h pci-v5.16-changes 2021-11-06 14:36:12 -07:00
probe.c pci-v5.17-changes 2022-01-16 08:08:11 +02:00
proc.c PCI: Remove unused assignments 2022-03-22 11:23:53 -05:00
quirks.c pci-v5.18-changes 2022-03-25 13:02:05 -07:00
remove.c PCI: Remove reset_fn field from pci_dev 2021-08-17 17:44:38 -05:00
rom.c PCI: Prefer 'unsigned int' over bare 'unsigned' 2021-10-27 13:41:22 -05:00
search.c
setup-bus.c Merge branch 'pci/misc' 2022-03-22 17:16:21 -05:00
setup-irq.c PCI: Tidy comments 2021-09-28 13:43:17 -05:00
setup-res.c PCI: Work around Intel I210 ROM BAR overlap defect 2022-01-11 09:33:10 -06:00
slot.c PCI/sysfs: Use default_groups in kobj_type for slot attrs 2021-12-29 13:42:04 -06:00
syscall.c PCI: Return int from pciconfig_read() syscall 2021-08-03 16:55:48 -05:00
vc.c
vgaarb.c PCI/VGA: Replace full MIT license text with SPDX identifier 2022-03-09 18:31:34 -06:00
vpd.c PCI/VPD: Use pci_read_vpd_any() in pci_vpd_size() 2021-10-25 19:12:23 -05:00
xen-pcifront.c xen/grant-table: remove readonly parameter from functions 2022-03-15 20:34:40 -05:00