Cruise Hung deaccddaf4 drm/amd/display: Fix DP MST sinks removal issue ... [Why] In USB4 DP tunneling, it's possible to have this scenario that the path becomes unavailable and CM tears down the path a little bit late. So, in this case, the HPD is high but fails to read any DPCD register. That causes the link connection type to be set to sst. And not all sinks are removed behind the MST branch. [How] Restore the link connection type if it fails to read DPCD register. Cc: stable@vger.kernel.org Cc: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Cruise Hung <Cruise.Hung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2023-03-15 18:45:26 -04:00
..
amdgpu_dm	drm/amd/display: Take FEC Overhead into Timeslot Calculation	2023-03-14 15:35:39 -04:00
dc	drm/amd/display: Fix DP MST sinks removal issue	2023-03-15 18:45:26 -04:00
dmub	drivers/gpu: fix typo in comment	2023-03-08 14:05:04 -05:00
include	drm/amd/display: Drop CONFIG_DRM_AMD_DC_HDCP	2023-03-07 14:22:39 -05:00
modules	drm/amd/display: Drop unnecessary DCN guards	2023-03-07 14:22:40 -05:00
Kconfig	drm/amd/display: Rename DCN config to FP	2023-03-07 14:22:40 -05:00
Makefile	drm/amd/display: Drop CONFIG_DRM_AMD_DC_HDCP	2023-03-07 14:22:39 -05:00
TODO