mirror of
https://github.com/torvalds/linux.git
synced 2026-05-13 08:39:31 +02:00
9bdbf7eb25
- DMA:
- Rework the DMA coherent API: introduce Coherent<T> as a generalized
container for arbitrary types, replacing the slice-only
CoherentAllocation<T>. Add CoherentBox for memory initialization
before exposing a buffer to hardware (converting to Coherent when
ready), and CoherentHandle for allocations without kernel mapping.
- Add Coherent::init() / init_with_attrs() for one-shot initialization
via pin-init, and from-slice constructors for both Coherent and
CoherentBox
- Add uaccess write_dma() for copying from DMA buffers to userspace
and BinaryWriter support for Coherent<T>
- DRM:
- Add GPU buddy allocator abstraction
- Add DRM shmem GEM helper abstraction
- Allow drm::Device to dispatch work and delayed work items to driver
private data
- Add impl_aref_for_gem_obj!() macro to reduce GEM refcount
boilerplate, and introduce DriverObject::Args for constructor
context
- Add dma_resv_lock helper and raw_dma_resv() accessor on GEM objects
- Clean up imports across the DRM module
- I/O:
- Merged via a signed tag from the driver-core tree: register!() macro
and I/O infrastructure improvements (IoCapable refactor, RelaxedMmio
wrapper, IoLoc trait, generic accessors, write_reg /
LocatedRegister)
- Nova (Core):
- Fix and harden the GSP command queue: correct write pointer
advancing, empty slot handling, and ring buffer indexing; add mutex
locking and make Cmdq a pinned type; distinguish wait vs no-wait
commands
- Add support for large RPCs via continuation records, splitting
oversized commands across multiple queue slots
- Simplify GSP sequencer and message handling code: remove unused
trait and Display impls, derive Debug and Zeroable where applicable,
warn on unconsumed message data
- Refactor Falcon firmware handling: create DMA objects lazily, add
PIO upload support, and use the Generic Bootloader to boot FWSEC on
Turing
- Convert all register definitions (PMC, PBUS, PFB, GC6, FUSE, PDISP,
Falcon) to the kernel register!() macro; add bounded_enum macro to
define enums usable as register fields
- Migrate all DMA usage to the new Coherent, CoherentBox, and
CoherentHandle APIs
- Harden firmware parsing with checked arithmetic throughout FWSEC,
Booter, RISC-V parsing paths
- Add debugfs support for reading GSP-RM log buffers; replace
module_pci_driver!() with explicit module init to support
module-level debugfs setup
- Fix auxiliary device registration for multi-GPU systems
- Various cleanups: import style, firmware parsing refactoring,
framebuffer size logging
- Rust:
- Add interop::list module providing a C linked list interface
- Extend num::Bounded with shift operations, into_bool(), and const
get() to support register bitfield manipulation
- Enable the generic_arg_infer Rust feature and add EMSGSIZE error
code
- Tyr:
- Adopt vertical import style per kernel Rust guidelines
- Clarify driver/device type names and use DRM device type alias
consistently across the driver
- Fix GPU model/version decoding in GpuInfo
- Workqueue:
- Add ARef<T> support for work and delayed work
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Merge tag 'drm-rust-next-2026-03-30' of https://gitlab.freedesktop.org/drm/rust/kernel into drm-next
DRM Rust changes for v7.1-rc1
- DMA:
- Rework the DMA coherent API: introduce Coherent<T> as a generalized
container for arbitrary types, replacing the slice-only
CoherentAllocation<T>. Add CoherentBox for memory initialization
before exposing a buffer to hardware (converting to Coherent when
ready), and CoherentHandle for allocations without kernel mapping.
- Add Coherent::init() / init_with_attrs() for one-shot initialization
via pin-init, and from-slice constructors for both Coherent and
CoherentBox
- Add uaccess write_dma() for copying from DMA buffers to userspace
and BinaryWriter support for Coherent<T>
- DRM:
- Add GPU buddy allocator abstraction
- Add DRM shmem GEM helper abstraction
- Allow drm::Device to dispatch work and delayed work items to driver
private data
- Add impl_aref_for_gem_obj!() macro to reduce GEM refcount
boilerplate, and introduce DriverObject::Args for constructor
context
- Add dma_resv_lock helper and raw_dma_resv() accessor on GEM objects
- Clean up imports across the DRM module
- I/O:
- Merged via a signed tag from the driver-core tree: register!() macro
and I/O infrastructure improvements (IoCapable refactor, RelaxedMmio
wrapper, IoLoc trait, generic accessors, write_reg /
LocatedRegister)
- Nova (Core):
- Fix and harden the GSP command queue: correct write pointer
advancing, empty slot handling, and ring buffer indexing; add mutex
locking and make Cmdq a pinned type; distinguish wait vs no-wait
commands
- Add support for large RPCs via continuation records, splitting
oversized commands across multiple queue slots
- Simplify GSP sequencer and message handling code: remove unused
trait and Display impls, derive Debug and Zeroable where applicable,
warn on unconsumed message data
- Refactor Falcon firmware handling: create DMA objects lazily, add
PIO upload support, and use the Generic Bootloader to boot FWSEC on
Turing
- Convert all register definitions (PMC, PBUS, PFB, GC6, FUSE, PDISP,
Falcon) to the kernel register!() macro; add bounded_enum macro to
define enums usable as register fields
- Migrate all DMA usage to the new Coherent, CoherentBox, and
CoherentHandle APIs
- Harden firmware parsing with checked arithmetic throughout FWSEC,
Booter, RISC-V parsing paths
- Add debugfs support for reading GSP-RM log buffers; replace
module_pci_driver!() with explicit module init to support
module-level debugfs setup
- Fix auxiliary device registration for multi-GPU systems
- Various cleanups: import style, firmware parsing refactoring,
framebuffer size logging
- Rust:
- Add interop::list module providing a C linked list interface
- Extend num::Bounded with shift operations, into_bool(), and const
get() to support register bitfield manipulation
- Enable the generic_arg_infer Rust feature and add EMSGSIZE error
code
- Tyr:
- Adopt vertical import style per kernel Rust guidelines
- Clarify driver/device type names and use DRM device type alias
consistently across the driver
- Fix GPU model/version decoding in GpuInfo
- Workqueue:
- Add ARef<T> support for work and delayed work
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: "Danilo Krummrich" <dakr@kernel.org>
Link: https://patch.msgid.link/DHGH4BLT03BU.ZJH5U52WE8BY@kernel.org
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|---|---|---|
| .. | ||
| alloc | ||
| block | ||
| debugfs | ||
| device | ||
| drm | ||
| fs | ||
| gpu | ||
| interop | ||
| io | ||
| iommu | ||
| irq | ||
| list | ||
| mm | ||
| net | ||
| num | ||
| pci | ||
| ptr | ||
| str | ||
| sync | ||
| time | ||
| .gitignore | ||
| acpi.rs | ||
| alloc.rs | ||
| auxiliary.rs | ||
| bitmap.rs | ||
| bits.rs | ||
| block.rs | ||
| bug.rs | ||
| build_assert.rs | ||
| clk.rs | ||
| configfs.rs | ||
| cpu.rs | ||
| cpufreq.rs | ||
| cpumask.rs | ||
| cred.rs | ||
| debugfs.rs | ||
| device_id.rs | ||
| device.rs | ||
| devres.rs | ||
| dma.rs | ||
| driver.rs | ||
| error.rs | ||
| faux.rs | ||
| firmware.rs | ||
| fmt.rs | ||
| fs.rs | ||
| generated_arch_reachable_asm.rs.S | ||
| generated_arch_static_branch_asm.rs.S | ||
| generated_arch_warn_asm.rs.S | ||
| gpu.rs | ||
| i2c.rs | ||
| id_pool.rs | ||
| impl_flags.rs | ||
| init.rs | ||
| interop.rs | ||
| io.rs | ||
| ioctl.rs | ||
| iov.rs | ||
| irq.rs | ||
| jump_label.rs | ||
| kunit.rs | ||
| lib.rs | ||
| list.rs | ||
| maple_tree.rs | ||
| miscdevice.rs | ||
| mm.rs | ||
| module_param.rs | ||
| net.rs | ||
| num.rs | ||
| of.rs | ||
| opp.rs | ||
| page.rs | ||
| pci.rs | ||
| pid_namespace.rs | ||
| platform.rs | ||
| prelude.rs | ||
| print.rs | ||
| processor.rs | ||
| ptr.rs | ||
| pwm.rs | ||
| rbtree.rs | ||
| regulator.rs | ||
| revocable.rs | ||
| safety.rs | ||
| scatterlist.rs | ||
| security.rs | ||
| seq_file.rs | ||
| sizes.rs | ||
| slice.rs | ||
| soc.rs | ||
| static_assert.rs | ||
| std_vendor.rs | ||
| str.rs | ||
| sync.rs | ||
| task.rs | ||
| time.rs | ||
| tracepoint.rs | ||
| transmute.rs | ||
| types.rs | ||
| uaccess.rs | ||
| usb.rs | ||
| workqueue.rs | ||
| xarray.rs | ||