linux/drivers/perf/hisilicon
Shaokun Zhang 5de587fd84 drivers/perf: hisi: Fix wrong value for all counters enable
[ Upstream commit 961abd78ad ]

In L3C uncore PMU drivers, bit16 is used to control all counters enable &
disable. Wrong value is given in the driver and its default value is 1'b1,
it can work because each PMU counter has its own control bits too.
Let's fix the wrong value.

Fixes: 2940bc4333 ("perf: hisi: Add support for HiSilicon SoC L3C PMU driver")
Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Will Deacon <will@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Link: https://lore.kernel.org/r/1591350221-32275-1-git-send-email-zhangshaokun@hisilicon.com
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-06-25 15:33:04 +02:00
..
hisi_uncore_ddrc_pmu.c drivers/perf: hisi: Fixup one DDRC PMU register offset 2019-01-13 09:51:10 +01:00
hisi_uncore_hha_pmu.c drivers/perf: hisi: Fix typo in events attribute array 2020-06-22 09:05:14 +02:00
hisi_uncore_l3c_pmu.c drivers/perf: hisi: Fix wrong value for all counters enable 2020-06-25 15:33:04 +02:00
hisi_uncore_pmu.c drivers/perf: hisi: update the sccl_id/ccl_id when MT is supported 2018-07-24 15:40:43 +01:00
hisi_uncore_pmu.h
Makefile perf: hisi: Add support for HiSilicon SoC DDRC PMU driver 2017-10-19 17:06:35 +01:00