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The arch_local_irq_*() wrappers in <asm/irqflags.h> dispatch between two
underlying primitives: the __daif_* path on most systems, and the
__pmr_* path on builds that use GIC PMR-based masking (Pseudo-NMI). The
leaf primitives are already __always_inline, but the wrappers themselves
are plain "static inline".
That is unsafe for noinstr callers: nothing prevents the compiler from
emitting an out-of-line copy of e.g. arch_local_irq_disable(), and an
out-of-line copy can be instrumented (ftrace, kcov, sanitizers), which
breaks the noinstr contract on the entry/idle paths that rely on these
helpers.
x86 hit and fixed exactly this class of bug in commit 7a745be1cc
("x86/entry: __always_inline irqflags for noinstr").
Force-inline all of the arch_local_irq_*() wrappers so they cannot be
emitted out-of-line:
- arch_local_irq_enable()
- arch_local_irq_disable()
- arch_local_save_flags()
- arch_irqs_disabled_flags()
- arch_irqs_disabled()
- arch_local_irq_save()
- arch_local_irq_restore()
The primary motivation is noinstr safety. There is a useful side effect
for fleet-wide profiling: when the wrapper is emitted out-of-line,
samples taken inside it during the post-WFI IRQ unmask in
default_idle_call() are attributed to arch_local_irq_enable rather than
default_idle_call(), and the FP-unwinder loses default_idle_call() from
the chain.
Signed-off-by: Breno Leitao <leitao@debian.org>
Reviewed-by: Leonardo Bras <leo.bras@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
200 lines
4.4 KiB
C
200 lines
4.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2012 ARM Ltd.
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*/
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#ifndef __ASM_IRQFLAGS_H
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#define __ASM_IRQFLAGS_H
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#include <asm/barrier.h>
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#include <asm/ptrace.h>
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#include <asm/sysreg.h>
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/*
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* Aarch64 has flags for masking: Debug, Asynchronous (serror), Interrupts and
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* FIQ exceptions, in the 'daif' register. We mask and unmask them in 'daif'
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* order:
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* Masking debug exceptions causes all other exceptions to be masked too/
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* Masking SError masks IRQ/FIQ, but not debug exceptions. IRQ and FIQ are
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* always masked and unmasked together, and have no side effects for other
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* flags. Keeping to this order makes it easier for entry.S to know which
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* exceptions should be unmasked.
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*/
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static __always_inline void __daif_local_irq_enable(void)
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{
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barrier();
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asm volatile("msr daifclr, #3");
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barrier();
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}
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static __always_inline void __pmr_local_irq_enable(void)
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{
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if (IS_ENABLED(CONFIG_ARM64_DEBUG_PRIORITY_MASKING)) {
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u32 pmr = read_sysreg_s(SYS_ICC_PMR_EL1);
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WARN_ON_ONCE(pmr != GIC_PRIO_IRQON && pmr != GIC_PRIO_IRQOFF);
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}
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barrier();
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write_sysreg_s(GIC_PRIO_IRQON, SYS_ICC_PMR_EL1);
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pmr_sync();
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barrier();
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}
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static __always_inline void arch_local_irq_enable(void)
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{
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if (system_uses_irq_prio_masking()) {
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__pmr_local_irq_enable();
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} else {
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__daif_local_irq_enable();
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}
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}
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static __always_inline void __daif_local_irq_disable(void)
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{
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barrier();
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asm volatile("msr daifset, #3");
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barrier();
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}
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static __always_inline void __pmr_local_irq_disable(void)
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{
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if (IS_ENABLED(CONFIG_ARM64_DEBUG_PRIORITY_MASKING)) {
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u32 pmr = read_sysreg_s(SYS_ICC_PMR_EL1);
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WARN_ON_ONCE(pmr != GIC_PRIO_IRQON && pmr != GIC_PRIO_IRQOFF);
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}
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barrier();
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write_sysreg_s(GIC_PRIO_IRQOFF, SYS_ICC_PMR_EL1);
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barrier();
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}
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static __always_inline void arch_local_irq_disable(void)
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{
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if (system_uses_irq_prio_masking()) {
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__pmr_local_irq_disable();
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} else {
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__daif_local_irq_disable();
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}
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}
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static __always_inline unsigned long __daif_local_save_flags(void)
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{
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return read_sysreg(daif);
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}
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static __always_inline unsigned long __pmr_local_save_flags(void)
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{
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return read_sysreg_s(SYS_ICC_PMR_EL1);
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}
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/*
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* Save the current interrupt enable state.
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*/
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static __always_inline unsigned long arch_local_save_flags(void)
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{
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if (system_uses_irq_prio_masking()) {
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return __pmr_local_save_flags();
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} else {
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return __daif_local_save_flags();
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}
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}
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static __always_inline bool __daif_irqs_disabled_flags(unsigned long flags)
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{
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return flags & PSR_I_BIT;
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}
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static __always_inline bool __pmr_irqs_disabled_flags(unsigned long flags)
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{
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return flags != GIC_PRIO_IRQON;
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}
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static __always_inline bool arch_irqs_disabled_flags(unsigned long flags)
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{
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if (system_uses_irq_prio_masking()) {
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return __pmr_irqs_disabled_flags(flags);
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} else {
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return __daif_irqs_disabled_flags(flags);
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}
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}
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static __always_inline bool __daif_irqs_disabled(void)
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{
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return __daif_irqs_disabled_flags(__daif_local_save_flags());
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}
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static __always_inline bool __pmr_irqs_disabled(void)
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{
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return __pmr_irqs_disabled_flags(__pmr_local_save_flags());
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}
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static __always_inline bool arch_irqs_disabled(void)
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{
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if (system_uses_irq_prio_masking()) {
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return __pmr_irqs_disabled();
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} else {
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return __daif_irqs_disabled();
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}
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}
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static __always_inline unsigned long __daif_local_irq_save(void)
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{
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unsigned long flags = __daif_local_save_flags();
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__daif_local_irq_disable();
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return flags;
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}
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static __always_inline unsigned long __pmr_local_irq_save(void)
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{
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unsigned long flags = __pmr_local_save_flags();
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/*
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* There are too many states with IRQs disabled, just keep the current
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* state if interrupts are already disabled/masked.
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*/
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if (!__pmr_irqs_disabled_flags(flags))
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__pmr_local_irq_disable();
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return flags;
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}
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static __always_inline unsigned long arch_local_irq_save(void)
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{
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if (system_uses_irq_prio_masking()) {
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return __pmr_local_irq_save();
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} else {
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return __daif_local_irq_save();
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}
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}
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static __always_inline void __daif_local_irq_restore(unsigned long flags)
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{
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barrier();
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write_sysreg(flags, daif);
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barrier();
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}
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static __always_inline void __pmr_local_irq_restore(unsigned long flags)
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{
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barrier();
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write_sysreg_s(flags, SYS_ICC_PMR_EL1);
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pmr_sync();
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barrier();
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}
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/*
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* restore saved IRQ state
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*/
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static __always_inline void arch_local_irq_restore(unsigned long flags)
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{
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if (system_uses_irq_prio_masking()) {
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__pmr_local_irq_restore(flags);
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} else {
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__daif_local_irq_restore(flags);
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}
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}
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#endif /* __ASM_IRQFLAGS_H */
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