Markos Chandras c8a34581ec MIPS: Emulate the BC1{EQ,NE}Z FPU instructions ... MIPS R6 introduced the following two branch instructions for COP1: BC1EQZ: Branch if Cop1 (FPR) Register Bit 0 is Equal to Zero BC1NEZ: Branch if Cop1 (FPR) Register Bit 0 is Not Equal to Zero Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>		2015-02-17 15:37:32 +00:00
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asm	MIPS: kernel: Prepare the JR instruction for emulation on MIPS R6	2015-02-17 15:37:31 +00:00
uapi/asm	MIPS: Emulate the BC1{EQ,NE}Z FPU instructions	2015-02-17 15:37:32 +00:00