Wenjing Liu c5a4f9010d drm/amd/display: adjust visual confirm dpp height offset to be 1/240 of v addressable ... [why] For timing with large v addressable visual confirm is just too small. It is difficult to tell visually which DPP we are using. On the other hand with timing with small v addressable visual confirm is too large and covers the UI area. [how] We calculate visual confirm dpp height offset based on v addressable so it stays relatively the same height i.e. 1/240 verticle portion of the screen. Reviewed-by: Jun Lei <jun.lei@amd.com> Acked-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Wenjing Liu <wenjing.liu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2023-08-07 17:14:08 -04:00
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amdgpu_dm	drm/amd/display: Enable DPIA trace with DC debug mask	2023-08-07 17:14:08 -04:00
dc	drm/amd/display: adjust visual confirm dpp height offset to be 1/240 of v addressable	2023-08-07 17:14:08 -04:00
dmub	drm/amd/display: Add interface to enable DPIA trace	2023-08-07 17:14:08 -04:00
include	drm/amd/display: Read replay data from sink	2023-08-07 17:14:07 -04:00
modules	drm/amd/display: Add Freesync Panel DM code	2023-08-07 17:14:07 -04:00
Kconfig	drm/amd/display: Allow building DC with clang on RISC-V	2023-07-21 16:52:25 -04:00
Makefile	drm/amd/display: Drop CONFIG_DRM_AMD_DC_HDCP	2023-03-07 14:22:39 -05:00
TODO