Algea Cao e836764568 drm/bridge: synopsys: dw-hdmi-qp: Optimize HDMI resolution switching process ... 1.Support phy pll clk enable/disable is separated from phy signal output. 2.Add avmute set/clear in resolution switching process. 3.To comply with the timing requirements of the HDMI protocol, HDMI must be enabled in tmds mode according to the following process: disable FRL -> enable/disable scramble —> power up phy 4.Optimize flt process Signed-off-by: Algea Cao <algea.cao@rock-chips.com> Change-Id: I5f48b3292b434b26ab28a4e7238a87c8d64d5a33		2022-08-16 10:53:51 +08:00
..
acpi
asm-generic
clocksource
crypto
drm	drm/bridge: synopsys: dw-hdmi-qp: Optimize HDMI resolution switching process	2022-08-16 10:53:51 +08:00
dt-bindings	dt-bindings: suspend: rk3588: add io-retention related macros	2022-08-11 21:02:38 +08:00
keys
kunit
kvm
linux	soc: rockchip: Add rockchip thunder boot service driver	2022-08-16 10:11:16 +08:00
math-emu
media	media: videobuf2: add plane data offset function	2022-04-26 15:45:01 +08:00
memory
misc
net	BACKPORT: esp: Fix possible buffer overflow in ESP transformation	2022-05-13 09:53:56 +01:00
pcmcia
ras
rdma
scsi
soc	soc: rockchip: opp_select: Support multiple regulator for opp table calibration	2022-08-15 15:40:26 +08:00
sound	Merge tag 'ASB-2022-06-05_12-5.10' of https://android.googlesource.com/kernel/common	2022-07-15 17:58:38 +08:00
target
trace	Merge tag 'ASB-2022-07-05_12-5.10' of https://android.googlesource.com/kernel/common	2022-07-15 18:11:10 +08:00
uapi	media: rockchip: ispp: support fec/orb image stabilization	2022-08-09 15:23:17 +08:00
vdso
video
xen