Krunoslav Kovac c21a764a98 drm/amd/display: Send PQ bit in AMD VSIF ... [WHY & HOW] PB9 bit 5 was added to signal PQ EOTF in AMD vendor specific infoframe. This change sets it when appropriate. Reviewed-by: Aric Cyr <aric.cyr@amd.com> Acked-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Krunoslav Kovac <krunoslav.kovac@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2023-11-17 09:30:50 -05:00
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amdgpu_dm	drm/amd/display: Refactor resource into component directory	2023-11-17 09:30:50 -05:00
dc	drm/amd/display: Add disable timeout option	2023-11-17 09:30:50 -05:00
dmub	drm/amd/display: add a debugfs interface for the DMUB trace mask	2023-11-17 09:30:49 -05:00
include	drm/amd/display: Revert "drm/amd/display: allow edp updates for virtual signal"	2023-10-26 18:58:14 -04:00
modules	drm/amd/display: Send PQ bit in AMD VSIF	2023-11-17 09:30:50 -05:00
Kconfig	drm/amd/display: Allow building DC with clang on RISC-V	2023-07-21 16:52:25 -04:00
Makefile	drm/amd/display: Refactor resource into component directory	2023-11-17 09:30:50 -05:00
TODO