Ankit Nautiyal b201029ca6 drm/i915/display: Ensure a non-zero safe window from PTL onwards ... From PTL onwards, the set context latency can be in the vactive region, letting the safe window start some lines before the vblank start. The DSB waits on this safe window instead of vblank (bits [15:14] select the safe window signal from the DPT unit to start the DMA engine). With modes that have a smaller vblank region, the computed guardband is clamped to the vblank length, making the undelayed and delayed vblank coincide. If the SCL is also 0, the 'safe window' becomes effectively 0, and the DSB configured to wait for it gets stalled, since the hardware never signals the safe window, leading to: *ERROR* [CRTC:159:pipe A] flip_done timed out *ERROR* [CRTC:159:pipe A] DSB 0 timed out waiting for idle Keep the set context latency at a minimum of 1 to avoid this. v2: Fix the bit numbers and correct the commit message. (Chaitanya) Fixes: 4a68c7516c ("drm/i915/dsb: Use safe window path when VRR TG is used") Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Assisted-by: GitHub-Copilot:Claude-Opus-4.8 Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> Link: https://patch.msgid.link/20260722062449.1166411-1-ankit.k.nautiyal@intel.com		2026-07-22 12:39:01 +05:30
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drm	drm/i915/display: Ensure a non-zero safe window from PTL onwards	2026-07-22 12:39:01 +05:30
host1x
ipu-v3
nova-core	drm-next for 7.2-rc1	2026-06-17 10:21:00 +01:00
tests
trace
vga	fbdev: Wrap fbcon updates from vga-switcheroo in helper	2026-06-09 16:00:11 +02:00
buddy.c
Kconfig
Makefile