linux/arch
Christophe Leroy 08fd6df8ea powerpc/8xx: Fix pinned TLBs with CONFIG_STRICT_KERNEL_RWX
commit 1e35eba405 upstream.

As spotted and explained in commit c12ab8dbc4 ("powerpc/8xx: Fix
Oops with STRICT_KERNEL_RWX without DEBUG_RODATA_TEST"), the selection
of STRICT_KERNEL_RWX without selecting DEBUG_RODATA_TEST has spotted
the lack of the DIRTY bit in the pinned kernel data TLBs.

This problem should have been detected a lot earlier if things had
been working as expected. But due to an incredible level of chance or
mishap, this went undetected because of a set of bugs: In fact the
DTLBs were not pinned, because instead of setting the reserve bit
in MD_CTR, it was set in MI_CTR that is the register for ITLBs.

But then, another huge bug was there: the physical address was
reset to 0 at the boundary between RO and RW areas, leading to the
same physical space being mapped at both 0xc0000000 and 0xc8000000.
This had by miracle no consequence until now because the entry was
not really pinned so it was overwritten soon enough to go undetected.

Of course, now that we really pin the DTLBs, it must be fixed as well.

Fixes: f76c8f6d25 ("powerpc/8xx: Add function to set pinned TLBs")
Cc: stable@vger.kernel.org # v5.8+
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Depends-on: c12ab8dbc4 ("powerpc/8xx: Fix Oops with STRICT_KERNEL_RWX without DEBUG_RODATA_TEST")
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/a21e9a057fe2d247a535aff0d157a54eefee017a.1636963688.git.christophe.leroy@csgroup.eu
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-11-26 10:39:19 +01:00
..
alpha alpha: Declare virt_to_phys and virt_to_bus parameter as pointer to volatile 2021-09-30 10:11:07 +02:00
arc ARC: export clear_user_page() for modules 2021-09-22 12:28:04 +02:00
arm ARM: dts: qcom: fix memory and mdio nodes naming for RB3011 2021-11-26 10:39:11 +01:00
arm64 arm64: vdso32: suppress error message for 'make mrproper' 2021-11-26 10:39:18 +01:00
c6x arch-cleanup-2020-10-22 2020-10-23 10:06:38 -07:00
csky csky: Fixup regs.sr broken in ptrace 2021-10-20 11:44:58 +02:00
h8300 h8300: fix PREEMPTION build, TI_PRE_COUNT undefined 2021-02-17 11:02:28 +01:00
hexagon hexagon: clean up timer-regs.h 2021-11-26 10:39:19 +01:00
ia64 ia64: don't do IA64_CMPXCHG_DEBUG without CONFIG_PRINTK 2021-11-18 14:03:55 +01:00
m68k m68k: set a default value for MEMORY_RESERVE 2021-11-18 14:04:24 +01:00
microblaze local64.h: make <asm/local64.h> mandatory 2021-01-12 20:18:16 +01:00
mips mips: lantiq: add support for clk_get_parent() 2021-11-26 10:39:16 +01:00
nds32 nds32: fix up stack guard gap 2021-07-28 14:35:46 +02:00
nios2 nios2: Make NIOS2_DTB_SOURCE_BOOL depend on !COMPILE_TEST 2021-11-02 19:48:23 +01:00
openrisc openrisc: fix SMP tlb flush NULL pointer dereference 2021-11-18 14:04:25 +01:00
parisc parisc/entry: fix trace test in syscall exit path 2021-11-21 13:46:36 +01:00
powerpc powerpc/8xx: Fix pinned TLBs with CONFIG_STRICT_KERNEL_RWX 2021-11-26 10:39:19 +01:00
riscv riscv: Fix asan-stack clang build 2021-11-02 19:48:25 +01:00
s390 s390/kexec: fix return code handling 2021-11-26 10:39:18 +01:00
sh sh: define __BIG_ENDIAN for math-emu 2021-11-26 10:39:12 +01:00
sparc sparc64: fix pci_iounmap() when CONFIG_PCI is not set 2021-10-09 14:40:56 +02:00
um um: virtio_uml: fix memory leak on init failures 2021-09-26 14:08:57 +02:00
x86 x86/hyperv: Fix NULL deref in set_hv_tscchange_cb() if Hyper-V setup fails 2021-11-26 10:39:19 +01:00
xtensa xtensa: xtfpga: Try software restart before simulating CPU reset 2021-10-27 09:56:47 +02:00
.gitignore
Kconfig arch/cc: Introduce a function to check for confidential computing features 2021-11-18 14:04:32 +01:00